- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄10662 > AD7739BRUZ (Analog Devices Inc)IC ADC 24BIT 8-CH 24-TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD7739BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 29/32頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT 8-CH 24-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 15.1k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 100mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個(gè)單端，單極；8 個(gè)單端，雙極；4 個(gè)差分，單極；4 個(gè)差分，雙極 |
| 產(chǎn)品目錄頁(yè)面： | 779 (CN2011-ZH PDF) |
| 配用： | EVAL-AD7739EBZ-ND - BOARD EVAL FOR AD7739 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)當(dāng)前第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)
AD7739
Data Sheet
Rev. A | Page 6 of 32
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
WRITE OPERATION
t11
0
ns
CS falling edge to SCLK falling edge setup
t12
30
ns
Data valid to SCLK rising edge setup time
t13
25
ns
Data valid after SCLK rising edge hold time
t14
50
ns
SCLK high pulse width
t15
50
ns
SCLK low pulse width
t16
0
ns
CS rising edge after SCLK rising edge hold time
1 Sample tested during initial release to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of DVDD) and timed from a voltage level of
1.6 V. See Figure 2 and Figure 3.
2 These numbers are measured with the load circuit of Figure 4 and defined as the time required for the output to cross the VOL or VOH limits.
3 This specification is relevant only if CS goes low while SCLK is low.
4 These numbers are derived from the measured time taken by the data output to change 0.5 V when loaded with the circuit of Figure 4. The measured number is then
extrapolated back to remove effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the Timing Specifications are the true bus
relinquish times of the part and as such are independent of external bus loading capacitances.
TIMING DIAGRAMS
Figure 2. Read Cycle Timing Diagram
Figure 3. Write Cycle Timing Diagram
Figure 4. Load Circuit for Access Time and Bus Relinquish Time
DOUT
MSB
LSB
CS
t4
t5A
t5
t6
t7
t9
t8
SCLK
03742-0-002
DIN
MSB
LSB
SCLK
CS
t11
t14
t15
t16
t13
t12
03742-0-003
ISOURCE (200A AT DVDD = 5V
100
A AT DV
DD = 3V)
ISINK (800A AT DVDD = 5V
100
A AT DV
DD = 3V)
1.6V
TO OUTPUT
PIN
50pF
03742-0-004
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MIC2550YML TR | IC USB TRANSCEIVER 16-MLF |
| 212437-4 | CONN PLUG DIN 6POS SHIELD BLACK |
| VI-B1X-IV-F2 | CONVERTER MOD DC/DC 5.2V 150W |
| LTC1415IG#PBF | IC A/D CONV 12BIT SAMPLNG 28SSOP |
| VE-B10-IV-F4 | CONVERTER MOD DC/DC 5V 150W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7739BRUZ | 制造商:Analog Devices 功能描述:IC, ADC, 24BIT, 15.1KSPS, TSSOP-24 |
| AD7739BRUZ-REEL7 | 功能描述:IC ADC 24BIT 8CH SIG-DEL 24TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD773A | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 20 MSPS Monolithic A/D Converter |
| AD773AJD | 制造商:Analog Devices 功能描述:ADC Single Pipelined 20Msps 10-bit Parallel 28-Pin CDIP 制造商:Rochester Electronics LLC 功能描述:IC, 10-BIT 20 MSPS ADC - Bulk |
| AD773AKD | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 20 MSPS Monolithic A/D Converter |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。