參數(shù)資料
型號(hào)： AD7738BRU
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 19/28頁(yè)
文件大小： 0K
描述： IC ADC 24BIT 8-CH 28-TSSOP
標(biāo)準(zhǔn)包裝： 50
位數(shù)： 24
采樣率（每秒）： 15.4k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 100mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
輸入數(shù)目和類型： 8 個(gè)單端，單極；8 個(gè)單端，雙極；4 個(gè)差分，單極；4 個(gè)差分，雙極
配用： EVAL-AD7738EBZ-ND - BOARD EVAL FOR AD7738
REV. 0
–26–
AD7738
Voltage Reference Inputs
The AD7738’s reference inputs, REFIN(+) and REFIN(–),
provide a differential reference input capability. The common-
mode range for these differential inputs is from AGND to AVDD.
The nominal reference voltage for specified operation is 2.5 V.
Both reference inputs feature a high impedance, dynamic load.
Because the input impedance on each reference input is dynamic,
external resistance/capacitance combinations may result in gain
errors on the part.
The output noise performance outlined in Tables I to VI is for
an analog input of 0 V and is unaffected by noise on the reference.
To obtain the same noise performance as shown in the noise tables
over the full input range requires a low noise reference source for
the AD7738. If the reference noise in the bandwidth of interest
is excessive, it will degrade the performance of the AD7738.
Recommended reference voltage sources for the AD7738 include
the ADR421, AD780, REF43, and REF192. It is generally
recommended to decouple the output of these references to
further reduce the noise level.
Reference Detect
The AD7738 includes on-chip circuitry to detect if the part has
a valid reference for conversions.
If the voltage between the REFIN(+) and REFIN(–) pins goes
below the NOREF Trigger Voltage (0.5 V typ) and the AD7738 is
performing conversion, the NOREF bit in the Channel Status
register is set.
I/O Port
The AD7738 Pin
SYNC/P1 can be used as a general-purpose
digital I/O pin or to synchronize the AD7738 with other devices
in the system. When the SYNC bit in the I/O Port register is set
and the
SYNC pin is low, the AD7738 doesn’t process any
conversion. If it is put into single conversion mode, Continuous
Conversion mode, or any Calibration mode, the AD7738 waits
until the
SYNC pin goes high and then starts operation. This
allows the user to start conversion from a known point in time,
i.e., the rising edge of the
SYNC pin.
0.1 F
+
10 F
ADR421
VOUT
GND
VIN
AVDD
+
10 F
0.1 F
AVDD
CLOCK
GENERATOR
MCLKIN
MCLKOUT
33pF
6.144MHz
DVDD
+
10 F
0.1 F
DVDD
ADCIN
24-BIT
-
ADC
BUFFER
MUXOUT -
AD7738
AIN7
MUX
AINCOM
AIN0
SERIAL
INTERFACE
AND
CONTROL
LOGIC
SCLK
DIN
DOUT
CS
RDY
RESET
REFIN(–)
REFIN(+)
DGND
AGND
HOST
SYSTEM
ANALOG
INPUTS
DVDD
0.1 F
20
Figure 17. Typical Connection for the AD7738 Application
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