參數(shù)資料
型號(hào)： AD7731
廠商： Analog Devices, Inc.
英文描述： Low Noise, High Throughput 24-Bit Sigma-Delta ADC
中文描述： 低噪聲，高吞吐量的24位Σ-Δ模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù)： 21/44頁(yè)
文件大?。?/td> 411K
代理商： AD7731
AD7731
–21–
REV. 0
CALIBRAT ION OPE RAT ION SUMMARY
T he AD7731 contains a number of calibration options as outlined previously. T able X VI summarizes the calibration types, the op-
erations involved and the duration of the operations. T here are two methods of determining the end of calibration. T he first is to
monitor the hardware
RDY
pin using either interrupt-driven or polling routines. T he second method is to do a software poll of the
RDY
bit in the Status Register. T his can be achieved by setting up the part for continuous reads of the Status Register once a calibra-
tion has been initiated. T he
RDY
pin and
RDY
bit go high on initiating a calibration and return low at the end of the calibration
routine. At this time, the MD2, MD1, MD0 bits of the Mode Register have returned to 0, 0, 0. T he FAST and SK IP bits are treated
as 0 for the calibration sequence so the full filter is always used for the calibration routines. See Calibration section for full details.
T able X VI. Calibration Operations
MD2, MD1,
MD0
Duration to
RDY
Low (CHP = 1)
Duration to
RDY
Low (CHP = 0)
Calibration T ype
Calibration Sequence
Internal Zero-Scale
1, 0, 0
22
×
1/Output Rate 24
×
1/Output Rate
Calibration on internal shorted input with PGA set
for selected input range. T he Offset Calibration
Register for the selected channel is updated at the
end of this calibration sequence. For full self-cali-
bration, this calibration should be preceded by an
Internal Full-Scale calibration. For applications
which require an Internal Zero-Scale and System
Full Scale calibration, this Internal Zero-Scale
calibration should be performed first.
Calibration on internally-generated input full-scale
with PGA set for selected input range. T he Gain
Calibration Register for the selected channel is
updated at the end of this calibration sequence. It is
recommended that internal full-scale calibrations
are performed on the operating input range except
for the 20 mV and 40 mV input ranges where opti-
mum results are achieved by calibrating on the
80 mV range. T his calibration should be followed
by either an Internal Zero-Scale or System Zero-
Scale calibration. T his calibration should be fol-
lowed by either an Internal Zero-Scale or System
Zero-Scale calibration. T his zero-scale calibration
should be performed at the operating input range.
Calibration on externally-applied input voltage with
PGA set for selected input range. T he input applied
is assumed to be the zero-scale of the system. For
full system calibration, this System Zero-Scale
calibration should be performed first. For applica-
tions which require a System Zero-Scale and Inter-
nal Full Scale calibration, this calibration should be
preceded by the Internal Full-Scale calibration. T he
Offset Calibration Register for the selected channel
is updated at the end of this calibration sequence.
Calibration on externally-applied input voltage with
PGA set for selected input range. T he input applied
is assumed to be the full-scale of the system. T his
calibration should be preceded by a System Zero-
Scale or Internal Zero-Scale calibration. T he Gain
Calibration Register for the selected channel is
updated at the end of this calibration sequence.
Internal Full-Scale
1, 0, 1
44
×
1/Output Rate 48
×
1/Output Rate
System Zero-Scale
1, 1, 0
22
×
1/Output Rate 24
×
1/Output Rate
System Full-Scale
1, 1, 1
22
×
1/Output Rate 24
×
1/Output Rate
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PDF描述
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