參數資料
型號: AD7715ARU-5REEL
廠商: Analog Devices Inc
文件頁數: 1/40頁
文件大?。?/td> 0K
描述: IC ADC 16BIT SIGMA-DELTA 16TSSOP
標準包裝: 2,500
位數: 16
采樣率(每秒): 500
數據接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數目: 1
功率耗散(最大): 9.5mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸入數目和類型: 1 個差分,單極;1 個差分,雙極
配用: EVAL-AD7715-3EBZ-ND - BOARD EVALUATION FOR AD7715
3 V/5 V, 450 μA
16-Bit, Sigma-Delta ADC
AD7715
Rev. D
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responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
FEATURES
Charge-balancing ADC
16-bits no missing codes
0.0015% nonlinearity
Programmable gain front end
Gains of 1, 2, 32 and 128
Differential input capability
Three-wire serial interface
SPI-, QSPI-, MICROWIRE-, and DSP-compatible
Ability to buffer the analog input
3 V (AD7715-3) or 5 V (AD7715-5) operation
Low supply current: 450 μA maximum @ 3 V supplies
Low-pass filter with programmable output update
16-lead SOIC/PDIP/TSSOP
FUNCTIONAL BLOCK DIAGRAM
PGA
BUFFER
CHARGE BALANCING
ADC
Σ-
MODULATOR
DIGITAL
FILTER
REF IN(–)
REF IN(+)
AVDD
DVDD
A = 1 TO 128
MCLK IN
MCLK OUT
RESET
AIN(+)
AIN(–)
SERIAL
INTERFACE
REGISTER BANK
SCLK
CS
DIN
DOUT
DRDY
CLOCK
GENERATION
AGND
DGND
AD7715
0
851
9-
0
01
Figure 1.
GENERAL DESCRIPTION
The AD7715 is a complete analog front end for low frequency
measurement applications. The part can accept low level input
signals directly from a transducer and outputs a serial digital
word. It employs a Σ-Δ conversion technique to realize up to
16 bits of no missing codes performance. The input signal is
applied to a proprietary programmable gain front end based
around an analog modulator. The modulator output is processed
by an on-chip digital filter. The first notch of this digital filter
can be programmed via the on-chip control register allowing
adjustment of the filter cutoff and output update rate.
The AD7715 features a differential analog input as well as a
differential reference input. It operates from a single supply (3 V
or 5 V). It can handle unipolar input signal ranges of 0 mV to
20 mV, 0 mV to 80 mV, 0 V to 1.25 V and 0 V to 2.5 V. It can
also handle bipolar input signal ranges of ±20 mV, ±80 mV,
±1.25 V and ±2.5 V. These bipolar ranges are referenced to the
negative input of the differential analog input. The AD7715
thus performs all signal conditioning and conversion for a
single channel system.
The AD7715 is ideal for use in smart, microcontroller, or DSP-
based systems. It features a serial interface that can be configured
for three-wire operation. Gain settings, signal polarity, and
update rate selection can be configured in software using the
input serial port. The part contains self-calibration and system
calibration options to eliminate gain and offset errors on the
part itself or in the system.
CMOS construction ensures very low power dissipation, and
power-down mode reduces the standby power consumption to
50 μW typical. The part is available in a 16-lead, 0.3 inch-wide,
plastic dual-in-line package (PDIP) as well as a 16-lead 0.3 inch
wide small outline (SOIC_W) package and a 16-lead TSSOP
package.
PRODUCT HIGHLIGHTS
1.
The AD7715 consumes less than 450 μA in total supply
current at 3 V supplies and 1 MHz master clock, making it
ideal for use in low-power systems. Standby current is less
than 10 μA.
2.
The programmable gain input allows the AD7715 to accept
input signals directly from a strain gage or transducer
removing a considerable amount of signal conditioning.
3.
The AD7715 is ideal for microcontroller or DSP processor
applications with a three-wire serial interface reducing the
number of interconnect lines and reducing the number
of optocouplers required in isolated systems. The part
contains on-chip registers which allow software control
over output update rate, input gain, signal polarity, and
calibration modes.
4.
The part features excellent static performance specifications
with 16-bits no missing codes, ±0.0015% accuracy, and low
rms noise (<550 nV). Endpoint errors and the effects of
temperature drift are eliminated by on-chip calibration
options, which remove zero-scale and full-scale errors.
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