- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗10188 > AD7714YRU (Analog Devices Inc)IC ADC SIGNAL COND 3/5V 24-TSSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AD7714YRU |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 14/40闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ADC SIGNAL COND 3/5V 24-TSSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 浣嶆暩(sh霉)锛� | 24 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 1k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | DSP锛孧ICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 1 |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 7mW |
| 闆诲闆绘簮锛� | 妯℃摤鍜屾暩(sh霉)瀛� |
| 宸ヤ綔婧害锛� | -40°C ~ 105°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 24-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 24-TSSOP |
| 鍖呰锛� | 绠′欢 |
| 杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� | 3 鍊�(g猫)宸垎锛屽柈妤�锛�3 鍊�(g猫)宸垎锛岄洐妤碉紱5 鍊�(g猫)鍋藉樊鍒�锛屽柈妤碉紱5 鍊�(g猫)鍋藉樊鍒�锛岄洐妤� |
| 閰嶇敤锛� | EVAL-AD7714-3EBZ-ND - BOARD EVAL FOR AD7714 |
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2
AD7714
REV. C
鈥�21鈥�
Table XIV. Input Sampling Frequency vs. Gain
Gain
Input Sampling Freq (fS)
1fCLK IN/64 (38.4 kHz @ fCLK IN = 2.4576 MHz)
22
脳 f
CLK IN/64 (76.8 kHz @ fCLK IN = 2.4576 MHz)
44
脳 f
CLK IN/64 (153.6 kHz @ fCLK IN = 2.4576 MHz)
88
脳 f
CLK IN/64 (307.2 kHz @ fCLK IN = 2.4576 MHz)
16
8
脳 f
CLK IN/64 (307.2 kHz @ fCLK IN = 2.4576 MHz)
32
8
脳 f
CLK IN/64 (307.2 kHz @ fCLK IN = 2.4576 MHz)
64
8
脳 f
CLK IN/64 (307.2 kHz @ fCLK IN = 2.4576 MHz)
128
8
脳 f
CLK IN/64 (307.2 kHz @ fCLK IN = 2.4576 MHz)
Burnout Current
The AD7714 contains two 1
A currents, one source current
from AVDD to AIN(+) and one sink from AIN(鈥�) to AGND. The
currents are either both on or off depending on the BO bit of the
Mode Register. These currents can be used in checking that a
transducer has not burned out nor gone open-circuit before
attempting to take measurements on that channel. If the cur-
rents are turned on, allowed flow in the transducer, a measure-
ment of the input voltage on the analog input taken and the
voltage measured is full scale, it indicates that the transducer has
gone open-circuit; if the voltage measured is zero, it indicates
that the transducer has gone short-circuit. For normal opera-
tion, these burnout currents are turned off by writing a 0 to the
BO bit. For the source current to work correctly, the applied
voltage on AIN(+) should not go within 500 mV of AVDD. For
the sink current to work correctly, the applied voltage on the
AIN(鈥�) input should not go within 500 mV of AGND.
Bipolar/Unipolar Inputs
The analog inputs on the AD7714 can accept either unipolar or
bipolar input voltage ranges. Bipolar input ranges do not imply
that the part can handle negative voltages on its analog inputs,
since the analog input cannot go more negative than 鈥�30 mV to
ensure correct operation of the part. The input channels are
either fully differential or pseudo-differential (all other channels
referenced to AIN6). In either case, the input channels are
arranged in pairs with an AIN(+) and AIN(鈥�). As a result, the
voltage to which the unipolar and bipolar signals on the AIN(+)
input are referenced is the voltage on the respective AIN(鈥�)
input. For example, if AIN(鈥�) is +2.5 V and the AD7714 is
configured for unipolar operation with a gain of 2 and a VREF of
+2.5 V, the input voltage range on the AIN(+) input is +2.5 V to
+3.75 V. If AIN(鈥�) is +2.5 V and the AD7714 is configured for
bipolar mode with a gain of 2 and a VREF of +2.5 V, the analog
input range on the AIN(+) input is +1.25 V to +3.75 V (i.e.,
2.5 V
卤 1.25 V). If AIN(鈥�) is at AGND, the part cannot be con-
figured for bipolar ranges in excess of
卤30 mV.
Bipolar or unipolar options are chosen by programming the
B/U
bit of the Filter High Register. This programs the selected chan-
nel for either unipolar or bipolar operation. Programming the
channel for either unipolar or bipolar operation does not change
any of the input signal conditioning; it simply changes the data
output coding and the points on the transfer function where
calibrations occur.
REFERENCE INPUT
The AD7714鈥檚 reference inputs, REF IN(+) and REF IN(鈥�),
provide a differential reference input capability. The common-
mode range for these differential inputs is from AGND to AVDD.
The nominal reference voltage, VREF (REF IN(+) 鈥揜EF IN(鈥�)),
for specified operation is +2.5 V for the AD7714-5 and +1.25 V
for the AD7714-3. The part is functional with VREF voltages
down to 1 V but with degraded performance as the output noise
will, in terms of LSB size, be larger. REF IN(+) must always be
greater than REF IN(鈥�) for correct operation of the AD7714.
Both reference inputs provide a high impedance, dynamic load
similar to the analog inputs in unbuffered mode. The maxi-
mum dc input leakage current is
卤1 nA over temperature and
source resistance may result in gain errors on the part. In this
case, the sampling switch resistance is 5 k
typ and the refer-
ence capacitor (CREF) varies with gain. The sample rate on the
reference inputs is fCLK IN/64 and does not vary with gain. For
gains of 1 to 8, CREF is 8 pF; for a gain of 16, it is 5.5 pF, for a
gain of 32, it is 4.25 pF, for a gain of 64, it is 3.625 pF and for a
gain of 128, it is 3.3125 pF.
The output noise performance outlined in Tables I through IV
is for an analog input of 0 V and is unaffected by noise on the
reference. To obtain the same noise performance as shown in
the noise tables over the full input range requires a low noise
reference source for the AD7714. If the reference noise in the
bandwidth of interest is excessive, it will degrade the perfor-
mance of the AD7714. In applications where the excitation
voltage for the bridge transducer on the analog input also de-
rives the reference voltage for the part, the effect of the noise in
the excitation voltage will be removed as the application is
ratiometric. Recommended reference voltage sources for the
AD7714-5 and AD7714Y grade with AVDD = 5 V include the
AD780, REF43 and REF192 while the recommended reference
sources for the AD7714-3 and AD7714Y with AVDD = 3 V
include the AD589 and AD1580. It is generally recommended
to decouple the output of these references to further reduce the
noise level.
DIGITAL FILTERING
The AD7714 contains an on-chip low-pass digital filter which
processes the output of the part鈥檚 sigma-delta modulator. There-
fore, the part not only provides the analog-to-digital conversion
function but it also provides a level of filtering. There are a
number of system differences when the filtering function is
provided in the digital domain rather than the analog domain
and the user should be aware of these.
First, since digital filtering occurs after the A-to-D conversion
process, it can remove noise injected during the conversion
process. Analog filtering cannot do this. Also, the digital filter
can be made programmable far more readily than an analog
filter. Depending on the digital filter design, this gives the user
the capability of programming cutoff frequency and output
update rate.
On the other hand, analog filtering can remove noise superim-
posed on the analog signal before it reaches the ADC. Digital
filtering cannot do this and noise peaks riding on signals near
full scale have the potential to saturate the analog modulator
and digital filter, even though the average value of the signal is
within limits. To alleviate this problem, the AD7714 has over-
range headroom built into the sigma-delta modulator and digital
filter which allows overrange excursions of 5% above the analog
input range. If noise signals are larger than this, consideration
should be given to analog input filtering, or to reducing the
input channel voltage so that its full scale is half that of the
analog input channel full scale. This will provide an overrange
capability greater than 100% at the expense of reducing the
dynamic range by 1 bit (50%).
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