參數(shù)資料
型號(hào)： AD7711AQ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 20/28頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT RTD I SOURCE 24CDIP
標(biāo)準(zhǔn)包裝： 15
位數(shù)： 24
采樣率（每秒）： 1.03k
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 52.5mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 80°C
安裝類(lèi)型： 通孔
封裝/外殼： 24-CDIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 24-CDIP
包裝： 管件
輸入數(shù)目和類(lèi)型： 1 個(gè)單端，單極；1 個(gè)單端，雙極；1 個(gè)差分，單極；1 個(gè)差分，雙極
2
REV.G
AD7711
–27–
3-Wire RTD Configurations
One possible 3-wire configuration using the AD7711 is outlined
in Figure 20. In the 3-wire configuration, the lead resistances
will result in errors if only one current source is used because
the 200
mA will flow through RL1, developing a voltage error
between AIN1(+) and AIN1(–). In the scheme outlined below,
the second RTD current source is used to compensate for the
error introduced by the 200
mA flowing through RL1. The second
RTD current flows through RL2. Assuming RL1 and RL2 are
equal (the leads would normally be of the same material and of
equal length) and RTD1 and RTD2 match, then the error voltage
across RL2 equals the error voltage across RL1 and no error voltage
is developed between AIN1(+) and AIN1(–). Twice the voltage
is developed across RL3 but because this is a common-mode
voltage, it will not introduce any errors. The circuit in Figure 20
shows the reference voltage for the AD7711 derived from the
part’s own internal reference.
VSS
DGND
ANALOG 5V SUPPLY
AVDD
DVDD
REF IN(+)
REF OUT
2.5V
REFERENCE
REF IN(–)
200 A
RTD1
PGA
A = 1–128
AIN1(+)
AIN1(–)
INTERNAL
CIRCUITRY
200 A
AD7711
AGND
RL1
RL2
RL3
RTD2
RTD
Figure 20. 3-Wire RTD Application with the AD7711
The circuit in Figure 21 shows an alternate 3-wire configura-
tion. In this case, the circuit has the same benefits in terms of
eliminating lead resistance errors as outlined in Figure 20, but it
has the additional benefit that the reference voltage is derived
from one of the current sources. This gives all the benefits of
eliminating RTD tempco errors as outlined in Figure 19. The
voltage on either RTD input can go to within 2 V of the AVDD
supply. The circuit is shown for a 2.5 V reference.
VSS
DGND
AVDD DVDD
REF IN(+)
200 A
RTD1
PGA
A = 1–128
AIN1(+)
AIN1(–)
INTERNAL
CIRCUITRY
200 A
AD7711
AGND
RL1
RL2
RL3
RTD2
REF IN(–)
12.5k
RTD
Figure 21. Alternate 3-Wire Configuration
OUTLINE DIMENSIONS
24-Lead Plastic Dual In-Line Package [PDIP]
(N-24)
Dimensions shown in inches and (millimeters)
24
1
12
13
1.185 (30.01)
1.165 (29.59)
1.145 (29.08)
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
SEATING
PLANE
0.015 (0.38) MIN
0.180
(4.57)
MAX
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.100
(2.54)
BSC
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AG
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