• 參數(shù)資料
    型號： AD7707BRU
    廠商： Analog Devices Inc
    文件頁數(shù)： 1/52頁
    文件大?。?/td> 0K
    描述： IC ADC 16BIT 3CH 20-TSSOP
    標(biāo)準(zhǔn)包裝： 75
    位數(shù)： 16
    采樣率（每秒）： 500
    數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
    轉(zhuǎn)換器數(shù)目： 1
    功率耗散（最大）： 1mW
    電壓電源： 模擬和數(shù)字
    工作溫度： -40°C ~ 85°C
    安裝類型： 表面貼裝
    封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
    供應(yīng)商設(shè)備封裝： 20-TSSOP
    包裝： 管件
    輸入數(shù)目和類型： 1 個單端，單極；1 個單端，雙極；2 個偽差分，單極；2 個偽差分，雙極
    3 V/5 V, ±10 V Input Range, 1 mW
    3-Channel 16-Bit, Sigma-Delta ADC
    AD7707
    Rev. B
    Information furnished by Analog Devices is believed to be accurate and reliable. However, no
    responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
    rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
    license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
    Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
    One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
    Tel: 781.329.4700
    www.analog.com
    Fax: 781.461.3113
    2000–2010 Analog Devices, Inc. All rights reserved.
    FEATURES
    Charge balancing ADC
    16 bits, no missing codes
    ±0.003% nonlinearity
    High level (±10 V) and low level (±10 mV) input channels
    True bipolar ±100 mV capability on low level input
    Channels without requiring charge pumps
    Programmable gain front end
    Gains from 1 to 128
    3-wire serial interface
    SPI, QSPI, MICROWIRE and DSP compatible
    Schmitt trigger input on SCLK
    Ability to buffer the analog input
    2.7 V to 3.3 V or 4.75 V to 5.25 V operation
    Power dissipation 1 mW at 3 V
    Standby current 8 μA maximum
    20-lead SOIC and TSSOP packages
    GENERAL DESCRIPTION
    The AD7707 is a complete analog front end for low frequency
    measurement applications. This 3-channel device can accept
    either low level input signals directly from a transducer or high
    level (±10 V) signals and produce a serial digital output. It employs
    a Σ-Δ conversion technique to realize up to 16 bits of no missing
    codes performance. The selected input signal is applied to a
    proprietary programmable gain front end based around an analog
    modulator. The modulator output is processed by an on-chip
    digital filter. The first notch of this digital filter can be pro-
    grammed via an on-chip control register allowing adjustment
    of the filter cutoff and output update rate.
    The AD7707 operates from a single 2.7 V to 3.3 V or 4.75 V to
    5.25 V supply. The AD7707 features two low level pseudo differen-
    tial analog input channels, one high level input channel and a
    differential reference input. Input signal ranges of 0 mV to 20 mV
    through 0 V to 2.5 V can be accommodated on both low level input
    channels when operating with a VDD of 5 V and a reference of
    2.5 V. They can also handle bipolar input signal ranges of ±20 mV
    through ±2.5 V, which are referenced to the LCOM input. The
    AD7707, with a 3 V supply and a 1.225 V reference, can handle
    unipolar input signal ranges of 0 mV to 10 mV through 0 V to
    1.225 V. Its bipolar input signal ranges are ±10 mV through ±1.225 V.
    The high level input channel can accept input signal ranges of ±10 V,
    ±5 V, 0 V to 10 V and 0 V to 5 V. The AD7707 thus performs all
    signal conditioning and conversion for a 3-channel system.
    The AD7707 is ideal for use in smart, microcontroller or DSP-
    based systems. It features a serial interface that can be configured
    FUNCTIONAL BLOCK DIAGRAM
    DVDD
    AVDD
    REF IN(–)
    REF IN(+)
    AD7707
    MUX
    PGA
    CHARGE
    BALANCING
    A/D CONVERTER
    Σ-Δ
    MODULATOR
    DIGITAL FILTER
    A = 1 ≈ 128
    SERIAL INTERFACE
    REGISTER BANK
    CLOCK
    GENERATION
    MCLK IN
    MCLK OUT
    AGND
    DGND
    DRDY
    RESET
    DIN
    DOUT
    CS
    SCLK
    086
    91
    -00
    1
    AIN1
    AIN2
    LOCOM
    AIN3
    VBIAS
    HICOM
    5k
    15k
    30k
    BUF
    Figure 1.
    for 3-wire operation. Gain settings, signal polarity and update
    rate selection can be configured in software using the input
    serial port. The part contains self-calibration and system calibra-
    tion options to eliminate gain and offset errors on the part itself
    or in the system.
    CMOS construction ensures very low power dissipation, and the
    power-down mode reduces the standby power consumption to
    20 μW typical. This part is available in a 20-lead wide body (0.3
    inch) small outline (SOIC) package and a low profile 20-lead TSSOP.
    PRODUCT HIGHLIGHTS
    1.
    The AD7707 consumes less than 1 mW at 3 V supplies and
    1 MHz master clock, making it ideal for use in low power
    systems. Standby current is less than 8 μA.
    2.
    On-chip thin-film resistors allow ±10 V, ±5 V, 0 V to 10 V,
    and 0 V to 5 V high level input signals to be directly accom-
    modated on the analog inputs without requiring split supplies
    or charge-pumps.
    3.
    The low level input channels allow the AD7707 to accept
    input signals directly from a strain gage or transducer
    removing a considerable amount of signal conditioning.
    4.
    The part features excellent static performance specifications
    with 16 bits, no missing codes, ±0.003% accuracy, and low
    rms noise. Endpoint errors and the effects of temperature
    drift are eliminated by on-chip calibration options, which
    remove zero-scale and full-scale errors.
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