參數(shù)資料
型號(hào)： AD7707
廠商： Analog Devices, Inc.
英文描述： ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75%
中文描述： 3 V / 5號(hào)第五，1毫瓦3 -10 V輸入范圍通道16位Σ-Δ模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù)： 11/40頁(yè)
文件大?。?/td> 316K
代理商： AD7707
REV. A
AD7707
–11–
Table VI. Output RMS Noise/ Peak-to-Peak Resolution vs. Gain and Output Update Rate @ +5 V
AIN3 Buffered Mode Only
Filter First
Notch and O/P
Data Rate
6
10 V Range
RMS Noise P-P (Bits)
(
m
V)
6
5 V Range
RMS Noise P-P (Bits)
0 V to +10 V Range
RMS Noise P-P (Bits)
0 to +5 V Range
RMS Noise P-P (Bits)
(
m
V)
–3dB
Frequency
Resolution (
m
V)
Resolution (
m
V)
Resolution
Resolution
MCLK IN = 2.4576 MHz
10Hz
50Hz
60Hz
250Hz
500Hz
2.62Hz
13.1Hz
15.72Hz
65.5Hz
131Hz
7.4
22.2
26.6
475
2423
16
16
16
13
10.5
5.2
14.3
15.85
187
1097
16
16
16
13
10.5
7.4
22.2
26.6
475
2423
16
16
16
12
9.5
5.2
14.3
15.85
187
1097
16
16
16
12
9.5
MCLK IN = 1 MHz
4.05Hz
20Hz
25Hz
100Hz
200Hz
1.06Hz
5.24Hz
6.55Hz
26.2Hz
52.4Hz
7.63
20.25
23.5
377
2226
16
16
16
13
10.5
5.45
13.3
14.6
210
1132
16
16
16
13
10.5
7.63
20.25
23.5
377
2226
16
16
16
12
9.5
5.45
13.3
14.6
210
1132
16
16
15.5
12
9.5
OUTPUT NOISE FOR HIGH LEVEL INPUT CHANNEL AIN3 (5 V OPERATION)
Table VII shows the AD7707 output rms noise and peak-to-peak resolution for the selectable notch and –3dB frequencies for the
part, as selected by FS0, FS1 and FS2 of the Clock Register. The numbers given are for the
±
5 V, 0 V to +5 V and 0 V to +10 V
ranges with a V
REF
of +1.225 V, HBIAS = 1.225 V, HICOM = AGND and AV
DD
= 3 V. These numbers are typical and are gener-
ated at an analog input voltage of 0 V for unbuffered mode of operation. The above operating ranges are only achievable in unbuf-
fered mode when operating at 3 V due to common-mode limitations on the input amplifier.
It is important to note that these numbers
represent the resolution for which there will be no code flicker. They are not calculated based on rms noise but on peak-to-peak noise.
Operating
at a gain of 1 in unipolar mode provides a range of 0 V to +10 V. Operating the high level channel with a gain of 2 in bipolar mode
provides a
±
5 V operating range. Operating at a gain of 2 in unipolar mode provides an operating range of 0V to +5 V. The output
noise comes from two sources. The first is the electrical noise in the semiconductor devices (device noise) used in the implementation
of the modulator. Secondly, when the analog input is converted into the digital domain, quantization noise is added. The device
noise is at a low level and is independent of frequency. The quantization noise starts at an even lower level but rises rapidly with
increasing frequency to become the dominant noise source. The numbers in the tables are given for the bipolar input ranges. For the
unipolar ranges the rms noise numbers will be the same as the bipolar range but the peak-to-peak resolution is now based on half the
signal range which effectively means losing 1 bit of resolution.
Table VII. Output RMS Noise/ Peak-to-Peak Resolution vs. Gain and Output Update Rate @ +3 V
AIN3 Unbuffered Mode Only
Filter First
Notch and O/P
Data Rate
0 V to +10 V Range
RMS Noise
(
m
V)
6
5 V Range
RMS Noise
(
m
V)
0 to +5 V Range
RMS Noise
(
m
V)
–3dB
Frequency
P-P (Bits)
Resolution
P-P (Bits)
Resolution
P-P (Bits)
Resolution
MCLK IN = 2.4576 MHz
10Hz
50Hz
60Hz
250Hz
500Hz
2.62Hz
13.1Hz
15.72Hz
65.5Hz
131Hz
12.4
30.35
34.55
498
2266
16
16
16
12.5
10.5
7.02
16.4
19.13
204
1151
16
16
16
13
10.5
7.02
16.4
19.13
204
1151
16
15.5
15
12
9.5
MCLK IN = 1 MHz
4.05Hz
20Hz
25Hz
100Hz
200Hz
1.06Hz
5.24Hz
6.55Hz
26.2Hz
52.4Hz
13.9
32.2
33.4
430
2207
16
16
16
13
10.5
7.3
17.4
18.57
200
1048
16
16
16
13
10.5
7.3
17.4
18.57
200
1048
16
15
15
12
9.5
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