參數(shù)資料
型號： AD768AR
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 16-Bit, 30 MSPS D/A Converter
中文描述： PARALLEL, WORD INPUT LOADING, 0.025 us SETTLING TIME, 16-BIT DAC, PDSO28
封裝： 0.300 INCH, SOIC-28
文件頁數(shù)： 9/20頁
文件大小： 334K
代理商： AD768AR
REV. B
–9–
Typical Performance Curves––AD768
0.2
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
V
TIME – 5ns/Div
R
L
= 50
V
OUT
= 0 TO –1V
Figure 14. Rise and Fall
Characteristics
10k
2.0M
1.0M
O
FREQUENCY – Hz
CLOCK = 10MHz
F
= 1.002MHz
AMPLITUDE = 0dBm
0
–20
–40
–60
–80
–100
Figure 17. Typical SFDR
(With a Window)
FREQUENCY – Hz
O
0
–100
150
350
190
230
270
310
–60
–80
–40
–20
CLOC = 240 kHz
F
OUT1
F
= 260 kHz
AMPLITUDE = –6.0 dB FS
OUTPUT IOUTB
R
L
= 50
Figure 20. Intermodulation
Distortion
R
L
= 50
V
OUT
= 0 TO –1V
–0.470
–0.472
–0.474
–0.476
–0.478
–0.480
–0.482
O
TIME – 2ns/Div
Figure 13. Glitch Impulse at Major
Carry
5
0.1
3
2
4
1
O
FREQUENCY – MHz
0
–20
–40
–60
–80
–100
CLOCK = 10MHz
F
OUT
= 1.002MHz
AMPLITUDE = 0dBm
OUTPUT IOUTB
R
L
= 50
Figure 16. Typical Spectral
Performance
FREQUENCY – MHz
T
–80
–75
–50
0.01
0.1
10
1
–65
–60
–55
–70
CLOCK = 1MHz
CLOCK = 10MHz
CLOCK = 20MHz
CLOCK = 30MHz
CLOCK = 40MHz
Figure 19. THD vs. F
OUT
Figure 12. Settling Time
FREQUENCY – MHz
–80
–75
–50
4
20
40
T
–65
–60
–55
–70
5
6 7 8 9 10
30
R
L
= 50
V
OUT
= 0 TO –1V
Figure 15. THD vs. Clock Frequency
at F
OUT
= 1 MHz
1
10
FREQUENCY – MHz
CLOCK = 30MHz
CLOCK = 20MHz
–86
–82
–50
–78
–74
–70
–66
–62
–58
–54
S
CLOCK = 10MHz
Figure 18. SFDR (Within a Window)
vs. F
OUT
–0.9405
–0.9443
–0.9415
–0.9424
–0.9433
–0.9453
–0.9500
–0.9462
–0.9472
–0.9498
–0.9481
12
24
36
14 16 18 20 22
34
26 28 30 32
1.00
0.60
0.90
0.80
0.70
0.50
0.10
0.40
0.30
0.20
0.05
O
E
TIME – ns
R
L
= 50
V
OUT
= 0 TO –1V
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PDF描述
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參數(shù)描述
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