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參數(shù)資料
| 型號(hào)： | AD7679ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 14/28頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT SAR W/BUFF 48LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 570k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 103mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個(gè)差分，雙極 |
| 配用： | EVAL-AD7679CBZ-ND - BOARD EVALUATION FOR AD7679 |
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AD7679
Rev. A | Page 21 of 28
In Read during Conversion mode, the serial clock and data
toggle at appropriate instants, minimizing potential
feedthrough between digital activity and critical conversion
decisions.
MASTER SERIAL INTERFACE
Internal Clock
The AD7679 is configured to generate and provide the serial
data clock SCLK when the EXT/INT pin is held low. The
AD7679 also generates a SYNC signal to indicate to the host
when the serial data is valid. The serial clock SCLK and the
SYNC signal can be inverted if desired. Depending on the
RDC/SDIN input, the data can be read after each conversion or
during the following conversion.
and
show
the detailed timing diagrams of these two modes.
In Read after Conversion mode, it should be noted that unlike
in other modes, the BUSY signal returns low after the 18 data
bits are pulsed out and not at the end of the conversion phase,
which results in a longer BUSY width.
To accommodate slow digital hosts, the serial clock can be
slowed down by using DIVSCLK.
Usually, because the AD7679 is used with a fast throughput, the
mode master read during conversion is the most recommended
serial mode.
t3
BUSY
CS, RD
CNVST
SYNC
SCLK
SDOUT
12
3
16
17
18
D17
D16
D2
D1
D0
X
EXT/INT = 0
RDC/SDIN = 0
INVSCLK = INVSYNC = 0
t14
t20
t15
t16
t22
t23
t29
t28
t18
t19
t21
t30
t25
t24
t26
t27
03085-0-040
Figure 38. Master Serial Data Timing for Reading (Read after Convert)
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參數(shù)描述 |
|---|---|
| AD7679ACPZRL | 功能描述:IC ADC 18BIT SAR W/BUFF 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD7679AST | 制造商:Analog Devices 功能描述:ADC Single SAR 570ksps 18-bit Parallel/Serial 48-Pin LQFP 制造商:Analog Devices 功能描述:18BIT SAR ADC SMD 7679 LQFP48 |
| AD7679ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 570ksps 18-bit Parallel/Serial 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 570KSPS 18BIT PARALLEL/SERL 48LQFP - Tape and Reel |
| AD7679ASTZ | 功能描述:IC ADC 18BIT 570KSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7679ASTZ | 制造商:Analog Devices 功能描述:IC 18-BIT ADC |
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