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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AD7675ACPZ |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 2/20闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ADC 16BIT SAR 100KSPS 48LFCSP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 绯诲垪锛� | PulSAR® |
| 浣嶆暩(sh霉)锛� | 16 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 100k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶锛屽苟鑱�(li谩n) |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 1 |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 25mW |
| 闆诲闆绘簮锛� | 妯℃摤鍜屾暩(sh霉)瀛� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 48-VFQFN 瑁搁湶鐒婄洡锛孋SP |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 48-LFCSP-VQ锛�7x7锛� |
| 鍖呰锛� | 鎵樼洡 |
| 杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� | 1 鍊�(g猫)宸垎锛岄洐妤� |
| 閰嶇敤锛� | EVAL-AD7675CBZ-ND - BOARD EVALUATION FOR AD7675 |
绗�1闋�鐣�(d膩ng)鍓嶇2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�
REV. A
AD7675
鈥�10鈥�
IN+
REF
REFGND
IN鈥�
32,768C 16,384C
MSB
4C
2C
C
LSB
SW+
SWITCHES
CONTROL
32,768C 16,384C
MSB
4C
2C
C
LSB
SW鈥�
BUSY
OUTPUT
CODE
CNVST
CONTROL
LOGIC
COMP
Figure 3. ADC Simplified Schematic
CIRCUIT INFORMATION
The AD7675 is a fast, low power, single-supply, precise 16-bit
analog-to-digital converter (ADC). The AD7675 is capable of
converting 100,000 samples per second (100 kSPS) and allows
power saving between conversions. When operating at 100 SPS,
for example, it consumes typically only 15
W. This feature
makes the AD7675 ideal for battery-powered applications.
The AD7675 provides the user with an on-chip track/hold,
successive approximation ADC that does not exhibit any pipe-
line or latency, making it ideal for multiple multiplexed channel
applications.
The AD7675 can be operated from a single 5 V supply and be
interfaced to either 5 V or 3 V digital logic. It is housed in a
48-lead LQFP package that combines space savings and allows
flexible configurations as either serial or parallel interface. The
AD7675 is pin-to-pin compatible with the AD7660.
CONVERTER OPERATION
The AD7675 is a successive approximation analog-to-digital
converter based on a charge redistribution DAC. Figure 3 shows
the simplified schematic of the ADC. The capacitive DAC con-
sists of two identical arrays of 16 binary-weighted capacitors that
are connected to the two comparator inputs.
During the acquisition phase, terminals of the array tied to the
comparator鈥檚 input are connected to AGND via SW+ and SW鈥�.
All independent switches are connected to the analog inputs.
Thus, the capacitor arrays are used as sampling capacitors and
acquire both analog signals.
When the acquisition phase is complete and the
CNVST input
goes or is low, a conversion phase is initiated. When the con-
version phase begins, SW+ and SW鈥� are opened first. The two
capacitor arrays are then disconnected from the inputs and
connected to the REFGND input. Therefore, the differential
voltage between the output of IN+ and IN鈥� captured at the
end of the acquisition phase is applied to the comparator inputs,
causing the comparator to become unbalanced.
By switching each element of the capacitor array between
REFGND or REF, the comparator input varies by binary
weighted voltage steps (VREF/2, VREF/4 . . .VREF/65536). The
control logic toggles these switches, starting with the MSB first,
in order to bring the comparator back into a balanced condition.
After the completion of this process, the control logic generates
the ADC output code and brings BUSY output low.
Transfer Functions
Using the OB/
2C digital input, the AD7675 offers two output
codings: straight binary and two鈥檚 complement. The ideal trans-
fer characteristic for the AD7675 is shown in Figure 4.
000...000
000...001
000...010
111...101
111...110
111...111
ANALOG INPUT
+FS 鈥� 1.5 LSB
+FS 鈥� 1 LSB
鈥揊S + 1 LSB
鈥揊S
鈥揊S + 0.5 LSB
ADC
CODE
鈥�
Straight
Binar
y
Figure 4. ADC Ideal Transfer Function
TEMPERATURE 鈥� C
5
3
鈥�5
鈥�55
135
鈥�35
LSB
鈥�15
鈥�5
15
35
55
75
95
1
鈥�1
鈥�3
115
4
2
0
鈥�2
鈥�4
鈥揊S
OFFSET
+FS
TPC 13. Drift vs. Temperature
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| AD7676ASTZRL | IC ADC 16BIT DIFF INP 48LQFP |
| AD7677ACPZ | IC ADC 16BIT DIFF INP 48-LFCSP |
| AD7678ACPZ | IC ADC 18BIT SAR W/BUFF 48LFCSP |
| AD7679ACPZ | IC ADC 18BIT SAR W/BUFF 48LFCSP |
| AD7680BRM | IC ADC 16BIT LP UNIPOLAR 8-MSOP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AD7675ACPZRL | 鍔熻兘鎻忚堪:IC ADC 16BIT SAR 100KSPS 48LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:PulSAR® 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:300k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:75mW 闆诲闆绘簮:鍠浕婧� 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:24-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:24-SOIC 鍖呰:甯跺嵎 (TR) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:1 鍊�(g猫)鍠锛屽柈妤�锛�1 鍊�(g猫)鍠锛岄洐妤� |
| AD7675AST | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LQFP 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:100 KSPS 16-BIT DIFFERENTIAL ADC - Tape and Reel 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:Analog-Digital Converter IC Number of Bi |
| AD7675ASTRL | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LQFP T/R 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:ADC SGL SAR 100KSPS 16BIT PARALLEL/SERL 48LQFP - Tape and Reel |
| AD7675ASTZ | 鍔熻兘鎻忚堪:IC ADC 16BIT DIFF INP 48LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:PulSAR® 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:TSA1204 View All Specifications 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:20M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 鍔熺巼鑰楁暎锛堟渶澶э級:155mW 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:48-TQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:48-TQFP锛�7x7锛� 鍖呰:Digi-Reel® 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:4 鍊�(g猫)鍠锛屽柈妤�锛�2 鍊�(g猫)宸垎锛屽柈妤� 鐢�(ch菐n)鍝佺洰閷勯爜闈�:1156 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:497-5435-6 |
| AD7675ASTZRL | 鍔熻兘鎻忚堪:IC ADC 16BIT DIFF INP 48LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:PulSAR® 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:300k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:75mW 闆诲闆绘簮:鍠浕婧� 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:24-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:24-SOIC 鍖呰:甯跺嵎 (TR) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:1 鍊�(g猫)鍠锛屽柈妤�锛�1 鍊�(g猫)鍠锛岄洐妤� |
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