參數(shù)資料
型號(hào)： AD7622
廠(chǎng)商： Analog Devices, Inc.
英文描述： 16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
中文描述： 16位，750 kSPS的，單極/雙極可編程輸入PulSAR系列ADC的
文件頁(yè)數(shù)： 8/32頁(yè)
文件大?。?/td> 587K
代理商： AD7622
AD7612
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 8 of 32
P
P
R
T
A
I
A
V
V
I
R
R
D
D
D
D
O
O
D
D
D
D
D
D
AGND
AVDD
AGND
BYTESWAP
OB/2C
SER/PAR
D0
D1
D2/DIVSCLK[0]
D3/DIVSCLK[1]
IMPULSE
WARP
BIPOLAR
CNVST
PD
RESET
CS
RD
TEN
BUSY
D15/SCCS
D14/SCCLK
D13/SCIN
D12/HW/SW
48
47 46
45
44
43 42
41
40 39 38 37
35
34
33
30
31
32
36
29
28
27
25
26
2
3
4
7
6
5
1
8
9
10
12
11
13 14
15
16
17 18 19
20
21
22
23 24
PIN 1
AD7612
TOP VIEW
(Not to Scale)
0
Figure 4. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
1, 3, 42
AGND
Type
1
P
Description
Analog Power Ground Pins. Ground reference point for all analog I/O. All analog I/O should be
referenced to AGND and should be connected to the analog ground plane of the system. In addition,
the AGND, DGND, and OGND voltages should be at the same potential.
Analog Power Pins. Nominally 4.75 V to 5.25 V and decoupled with 10 μF and 100 nF capacitors.
Parallel Mode Selection (8-Bit/16-Bit). When high, the LSB is output on D[15:8] and the MSB is output
on D[7:0]; when low, the LSB is output on D[7:0] and the MSB is output on D[15:8].
Straight Binary/Binary Twos Complement Output. When high, the digital output is straight binary.
When low, the MSB is inverted resulting in a twos complement output from its internal shift register.
Conversion Mode Selection. Used in conjunction with the IMPULSE input per the following:
Conversion Mode
WARP
IMPULSE
Normal
Low
Low
Impulse
Low
High
Warp
High
Low
Normal
High
High
See the Modes of Operation section for a more detailed description.
Conversion Mode Selection. See the WARP pin description in the previous row of this table. See the
Modes of Operation section for a more detailed description.
Serial/Parallel Selection Input.
When SER/PAR = low, the parallel mode is selected.
When SER/PAR = high, the serial modes are selected. Some bits of the data bus are used as a serial port
and the remaining data bits are high impedance outputs.
Bit 0 and Bit 1 of the parallel port data output bus. These pins are always outputs regardless of the
state of SER/PAR.
In parallel mode, these outputs are used as Bit 2 and Bit 3 of the parallel port data output bus.
Serial Data Division Clock Selection. In serial master read after convert mode (SER/PAR = high, EXT/INT
= low, RDC/SDIN = low) these inputs can be used to slow down the internally generated serial data
clock that clocks the data output. In other serial modes, these pins are high impedance outputs.
2, 44
4
AVDD
BYTESWAP
P
DI
5
OB/2C
DI
2
6
WARP
DI
2
7
IMPULSE
DI
2
8
SER/PAR
DI
9, 10
D[0:1]
DO
11, 12
D[2:3] or
DIVSCLK[0:1]
DI/O
相關(guān)PDF資料
PDF描述
AD7623 16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
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AD7623 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Ultralow Power, Low Distortion
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