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| 型號： | AD7575JPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT TRACK&HOLD 20-PLCC |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標準包裝： | 49 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 50k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 15mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC（9x9） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
AD7575
–4–
REV. B
TERMINOLOGY
LEAST SIGNIFICANT BIT (LSB)
An ADC with 8-bits resolution can resolve 1 part in 2
8 (i.e.,
256) of full scale. For the AD7575 with +2.46 V full-scale one
LSB is 9.61 mV.
TOTAL UNADJUSTED ERROR
This is a comprehensive specification that includes full-scale
error, relative accuracy and offset error.
RELATIVE ACCURACY
Relative Accuracy is the deviation of the ADC’s actual code
transition points from a straight line drawn between the devices
measured first LSB transition point and the measured full-scale
transition point.
SNR
Signal-to-Noise Ratio (SNR) is the ratio of the desired signal to
the noise produced in the sampled and digitized analog signal.
SNR is dependent on the number of quantization levels used in
the digitization process; the more levels, the smaller the quantiza-
tion noise. The theoretical SNR for a sine wave input is given by
SNR = (6.02 N + 1.76) dB
where N is the number of bits in the ADC.
FULL-SCALE ERROR (GAIN ERROR)
The gain of a unipolar ADC is defined as the difference between
the analog input levels required to produce the first and the last
digital output code transitions. Gain error is a measure of the
deviation of the actual span from the ideal span of FS – 2 LSBs.
ANALOG INPUT RANGE
With VREF = +1.23 V, the maximum analog input voltage range
is 0 V to +2.46 V. The output data in LSBs is related to the
analog input voltage by the integer value of the following
expression:
Data (LSBs) =
256 AIN
2 VREF
+ 0.5
SLEW RATE
Slew Rate is the maximum allowable rate of change of input
signal such that the digital sample values are not in error. Slew
Rate limitations may restrict the analog signal bandwidth for
full-scale analog signals below the bandwidth allowed from
sampling theorem considerations.
ORDERING GUIDE
Relative
Temperature
Accuracy
Package
Model
1
Range
(LSB)
Options
2
AD7575JR
0
°C to +70°C
±1 max
R-18
AD7575JN
0
°C to +70°C
±1 max
N-18
AD7575KN
0
°C to +70°C
±1/2 max
N-18
AD7575JP
0
°C to +70°C
±1 max
P-20A
AD7575KP
0
°C to +70°C
±1/2 max
P-20A
AD7575AQ
–25
°C to +85°C
±1 max
Q-18
AD7575BQ
–25
°C to +85°C
±1/2 max
Q-18
AD7575SQ
–55
°C to +125°C
±1 max
Q-18
AD7575TQ
–55
°C to +125°C
±1/2 max
Q-18
AD7575SE
–55
°C to +125°C
±1 max
E-20A
AD7575TE
–55
°C to +125°C
±1/2 max
E-20A
NOTES
1To order MIL-STD-883, Class B process parts, add /883B to part number.
Contact local sales office for military data sheet. For U.S. Standard Military
Drawing (SMD), see DESC drawing #5962-87762.
2E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip, R = SOIC.
PIN CONFIGURATIONS
PLCC
DIP/SOIC
LCCC
TOP VIEW
(Not to Scale)
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
AD7575
DGND
DB5
CS
RD
TP
BUSY
DB6
DB7 (MSB)
CLK
DB4
DB3
VDD
VREF
AIN
AGND
DB2
DB1
DB0 (LSB)
TOP VIEW
(Not to Scale)
20 19
1
2
3
18
14
15
16
17
4
5
6
7
8
9
10 111213
NC = NO CONNECT
BUSY
CLK
DB7 (MSB)
DB6
DB5
AIN
AGND
DB0 (LSB)
DB1
DB2
TP
RD
CS
V
DD
V
REF
DGND
NC
DB4
DB3
AD7575
3
2
1
20
19
9
10
11
12
13
18
17
16
15
14
4
5
6
7
8
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
NC = NO CONNECT
TP
BUSY
CLK
DB7 (MSB)
DB6
AIN
AGND
DB0 (LSB)
DB1
DB2
AD7575
RD
CS
NC
V
DD
V
REF
DB5
DGND
NC
DB4
DB3
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| AD7575JPZ-REEL | 功能描述:IC ADC 8BIT LC2MOS W/HOLD 20PLCC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
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