AD7472鈥揝PECIFICATIONS1 (V DD
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AD7472BRZ
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 16/21闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC ADC 12BIT PARALLEL 24SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 31
浣嶆暩(sh霉)锛� 12
閲囨ǎ鐜囷紙姣忕锛夛細 1.5M
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 骞惰伅(li谩n)
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 1
鍔熺巼鑰楁暎锛堟渶澶э級锛� 12mW
闆诲闆绘簮锛� 妯℃摤鍜屾暩(sh霉)瀛�
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 24-SOIC锛�0.295"锛�7.50mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 24-SOIC W
鍖呰锛� 绠′欢
杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� 1 鍊�(g猫)鍠锛屽柈妤�
REV. B
鈥�3鈥�
AD7470/AD7472
AD7472鈥揝PECIFICATIONS1 (V
DD = 2.7 V to 5.25 V
2, REF IN = 2.5 V, A and B Versions: f
CLKIN = 26 MHz @ 5 V and
20 MHz @ 3 V, TA = TMIN to TMAX, unless otherwise noted.)
Parameter
A Version
1
B Version
1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
5 V
3 V
5 V3 V
fS = 1.5 MSPS @ 5 V, fS = 1.2 MSPS @ 3 V
Signal to Noise + Distortion (SINAD) 69
69
dB typ
fIN = 500 kHz Sine Wave
68
dB min
fIN = 100 kHz Sine Wave
Signal-to-Noise Ratio (SNR)
70
dB typ
fIN = 500 kHz Sine Wave
68
dB min
fIN = 100 kHz Sine Wave
Total Harmonic Distortion (THD)
鈥�83
鈥�78
鈥�83
鈥�78
dB typ
fIN = 500 kHz Sine Wave
鈥�83
鈥�84
鈥�83
鈥�84
dB typ
fIN = 100 kHz Sine Wave
鈥�75
dB max
fIN = 100 kHz Sine Wave
Peak Harmonic or Spurious Noise
(SFDR)
鈥�86
鈥�81
鈥�86
鈥�81
dB typ
fIN = 500 kHz Sine Wave
鈥�86
dB typ
fIN = 100 kHz Sine Wave
鈥�76
dB max
fIN = 100 kHz Sine Wave
Intermodulation Distortion (IMD)
Second-Order Terms
鈥�77
dB typ
fIN = 500 kHz Sine Wave
鈥�86
dB typ
fIN = 100 kHz Sine Wave
Third-Order Terms
鈥�77
dB typ
fIN = 500 kHz Sine Wave
鈥�86
dB typ
fIN = 100 kHz Sine Wave
Aperture Delay
5
ns typ
Aperture Jitter
15
ps typ
Full Power Bandwidth
20
MHz typ
@ 3 dB
DC ACCURACY
fS = 1.5 MSPS @ 5 V, fS = 1.2 MSPS @ 3 V
Resolution
12
Bits
Integral Nonlinearity
卤 2
卤 1
卤1
LSB max
Guaranteed No Missed Codes to 11 Bits
(A Version)
Differential Nonlinearity
卤 1.8
卤 0.9
卤0.9
LSB max
Guaranteed No Missed Codes to 12 Bits
(B Version)
Offset Error
卤 10
卤10
LSB max
Gain Error
卤 2
卤2
LSB max
ANALOG INPUT
Input Voltage Ranges
0 to REF IN 0 to REF IN
V
DC Leakage Current
卤 1
卤1
A max
Input Capacitance
33
pF typ
REFERENCE INPUT
REF IN Input Voltage Range
2.5
V
卤1% for Specified Performance
DC Leakage Current
卤1
A max
Input Capacitance
10/20
pF typ
Track-and-Hold Mode
LOGIC INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.4
V max
Input Current, IIN
卤1
A max
Typically 10 nA, VIN = 0 V or VDD
Input Capacitance, CIN
3
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDRIVE 鈥� 0.2
V min
ISOURCE = 200
A
Output Low Voltage, VOL
0.4
V max
ISINK = 200
A
Floating-State Leakage Current
卤 10
卤10
A max
VDD = 2.7 V to 5.25 V
Floating-State Output Capacitance
10
pF max
Output Coding
Straight (Natural) Binary
CONVERSION RATE
Conversion Time
14
CLK IN
Cycles (max)
Track-and-Hold Acquisition Time
135
ns min
Throughput Rate
1.5
1.2
1.5
1.2
MSPS max
Conversion Time + Acquisition Time
POWER REQUIREMENTS
VDD
+2.7/+5.25
V min/max
IDD
4
Digital Inputs = 0 V or DVDD
Normal Mode
2.4
mA max
VDD = 4.75 V to 5.25 V; Typ 2 mA; fS = 1.5 MSPS
Quiescent Current
900
A max
VDD = 4.75 V to 5.25 V; fS = 1.5 MSPS
Normal Mode
1.5
mA max
VDD = 2.7 V to 3.3 V; Typ 1.3 mA; fS = 1.2 MSPS
Quiescent Current
800
A max
VDD = 2.7 V to 3.3 V; fS = 1.2 MSPS
Sleep Mode
1
A max
CLK IN = 0 V or DVDD
Power Dissipation
4
Digital Inputs = 0 V or DVDD
Normal Mode
12
mW max
VDD = 5 V
4.5
mW max
VDD = 3 V
Sleep Mode
5
W max
VDD = 5 V; CLK IN = 0 V or DVDD
33
W max
VDD = 3 V; CLK IN = 0 V or DVDD
NOTES
1Temperature ranges as follows: A and B Versions: 鈥�40
掳C to +85掳C.
2The AD7472 functionally works at 2.35 V. Typical specifications @ 25
掳C for SNR (100 kHz) = 68 dB; THD (100 kHz) = 鈥�84 dB; INL 卤 0.8 LSB.
3Sample tested @ 25
掳C to ensure compliance.
4See Power vs. Throughput Rate section.
Specifications subject to change without notice.
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