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參數(shù)資料
| 型號(hào)： | AD7470ARU |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 5/21頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT PARALLEL 24-TSSOP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 1.75M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 12mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極 |
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REV. B
AD7470/AD7472
–12–
PARALLEL INTERFACE
The parallel interfaces of the AD7470 and AD7472 are 10 bits
and 12 bits wide, respectively. The output data buffers are acti-
vated when both
CS and RD are logic low. At this point, the con-
tents of the data register are placed onto the data bus. Figure 10
shows the timing diagram for the parallel port.
Figure 11 shows the timing diagram for the parallel port when
CS and RD are tied permanently low. In this setup, once BUSY
line goes from high to low, the conversion process is completed.
The data is available on the output bus slightly before the falling
edge of BUSY.
It is important to point out that data bus cannot change state
while the ADC is doing a conversion as this would have a detri-
mental effect on the conversion in progress. The data out lines
will go three-state again when either the
RD or the CS line goes
high. Thus the
CS can be tied low permanently, leaving the RD
line to control conversion result access. Refer to VDRIVE section
for output voltage levels.
t2
tCONVERT
t3
t4
t8
t5
t6
t7
t9
t10
BUSY
CS
RD
DBx
CONVST*
*
CONVST SHOULD GO HIGH WHEN THE CLK IS HIGH OR BEFORE THE FIRST CLK CYCLE.
Figure 10. Parallel Port Timing
t2
tCONVERT
t9
CONVST*
BUSY
DBx
DATA N
DATA N + 1
*
CONVST SHOULD GO HIGH WHEN THE CLK IS HIGH OR BEFORE THE FIRST CLK CYCLE.
Figure 11. Parallel Port Timing with
CS and RD Tied Low
t2
t3
t4
t8
t6
t7
CLK IN
CONVST
BUSY
CS
RD
DBX
tWAKEUP
t5
tCONVERT
Figure 12. Wake-Up Timing Diagram (Burst Clock)
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| ad7470-aru | 制造商:Analog Devices 功能描述: |
| AD7470ARU-REEL | 制造商:Analog Devices 功能描述:ADC SGL SAR 1.75MSPS 10-BIT PARALLEL 24TSSOP - Tape and Reel |
| AD7470ARU-REEL7 | 功能描述:IC ADC 10BIT PARALLEL 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7470ARUZ | 功能描述:IC ADC 10BIT PARALLEL 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7470ARUZ-REEL | 功能描述:IC ADC 10BIT PARLLEL 24TSSOP T/R RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個(gè)單端，雙極；8 個(gè)差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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