B Version2 Unit CONVERSION RATE Convers" />
參數(shù)資料
型號: AD7452BRTZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 25/29頁
文件大小: 0K
描述: IC ADC 12BIT DIF 555KSPS SOT23-8
標準包裝: 3,000
位數(shù): 12
采樣率(每秒): 555k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 7.25mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應商設備封裝: SOT-23-8
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,雙極
AD7452
Rev. B | Page 4 of 28
Parameter
Test Conditions/Comments
B Version2
Unit
CONVERSION RATE
Conversion Time
1.6 s with a 10 MHz SCLK
16
SCLK cycles
Track-and-Hold Acquisition Time3
Sine wave input
200
ns max
Step input
290
ns max
Throughput Rate
555
kSPS max
POWER REQUIREMENTS
VDD
Range: 3 V + 20%/–10%;
5 V ± 5%
2.7/5.25
V min/V max
Normal Mode (Static)
SCLK on or off
0.5
mA typ
Normal Mode (Operational)
VDD = 4.75 V to 5.25 V
1.5
mA max
VDD = 2.7 V to 3.6 V
1.2
mA max
Full Power-Down Mode
SCLK on or off
1
A max
Power Dissipation
Normal Mode (Operational)
VDD = 5 V, 1.55 mW typ for 100 kSPS9
7.25
mW max
VDD = 3 V, 0.64 mW typ for 100 kSPS9
3.3
mW max
Full Power-Down
VDD = 5 V, SCLK on or off
5
W max
VDD = 3 V, SCLK on or off
3
W max
1 Common-mode voltage. The input signal can be centered on a dc common-mode voltage in the range specified in
and
.
Figure 23
Figure 24
2 Temperature ranges as follows: B Version: –40°C to +85°C.
3 See
section.
Terminology
4 Analog inputs with slew rates exceeding 27 V/s (full-scale input sine wave > 3.5 MHz) within the acquisition time may cause an incorrect result to be returned by the
converter.
5 Because the input spans of VIN+ and VIN– are both VREF and are 180° out of phase, the differential voltage is 2 × VREF.
6 The AD7452 is functional with a reference input from 100 mV; for VDD = 5 V, the reference can range up to 3.5 V.
7 The AD7452 is functional with a reference input from 100 mV; for VDD = 3 V, the reference can range up to 2.2 V.
8 Guaranteed by characterization.
9 See
section.
Power vs. Throughput Rate
10 Measured with a midscale dc input.
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