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參數(shù)資料
| 型號： | AD7401YRWZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MODULATOR SIGMA-DELTA 16SOIC |
| 標準包裝： | 47 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 20M |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 93.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 16-SOIC W |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
AD7401
Rev. D | Page 13 of 20
THEORY OF OPERATION
CIRCUIT INFORMATION
The AD7401 isolated Σ-Δ modulator converts an analog input
signal into a high speed (20 MHz maximum), single-bit data
stream; the time average of the modulator’s single-bit data is
directly proportional to the input signal. Figure 23 shows a
typical application circuit where the AD7401 is used to provide
isolation between the analog input, a current sensing resistor,
and the digital output, which is then processed by a digital filter
to provide an N-bit word.
ANALOG INPUT
The differential analog input of the AD7401 is implemented
with a switched capacitor circuit. This circuit implements a
second-order modulator stage that digitizes the input signal
into a 1-bit output stream. The sample clock (MCLKIN)
provides the clock signal for the conversion process as well as
the output data-framing clock. This clock source is external on
the AD7401. The analog input signal is continuously sampled
by the modulator and compared to an internal voltage reference.
A digital stream that accurately represents the analog input over
time appears at the output of the converter (see Figure 21).
MODULATOR OUTPUT
+FS ANALOG INPUT
–FS ANALOG INPUT
ANALOG INPUT
0
5851-
020
Figure 21. Analog Input vs. Modulator Output
A differential signal of 0 V results (ideally) in a stream of 1s and
0s at the MDAT output pin. This output is high 50% of the time
and low 50% of the time. A differential input of 200 mV pro-
duces a stream of 1s and 0s that are high 81.25% of the time. A
differential input of 200 mV produces a stream of 1s and 0s
that are high 18.75% of the time.
A differential input of 320 mV results in a stream of, ideally, all
1s. This is the absolute full-scale range of the AD7401, while
200 mV is the specified full-scale range, as shown in Table 9.
Table 9. Analog Input Range
Analog Input
Voltage Input
Full-Scale Range
+640 mV
Positive Full-Scale
+320 mV
Positive Specified Input Range
+200 mV
Zero
0 mV
Negative Specified Input Range
200 mV
Negative Full-Scale
320 mV
To reconstruct the original information, this output needs to be
digitally filtered and decimated. A Sinc3 filter is recommended
because this is one order higher than that of the AD7401 modu-
lator. If a 256 decimation rate is used, the resulting 16-bit word
rate is 62.5 kHz, assuming a 16 MHz external clock frequency.
Figure 22 shows the transfer function of the AD7401 relative to
the 16-bit output.
65535
53248
SPECIFIED RANGE
ANALOG INPUT
AD
C
CO
DE
12288
–320mV
–200mV
+200mV +320mV
0
0
5
851
-02
1
Figure 22. Filtered and Decimated 16-Bit Transfer Characteristic
Σ-
MOD/
ENCODER
INPUT
CURRENT
NONISOLATED
5V/3V
ISOLATED
5V
VDD1
RSHUNT
VIN+
VIN–
GND1
VDD
GND
VDD2
MDAT
SINC3 FILTER
AD7401
MCLKIN
SDAT
CS
SCLK
MCLK
GND2
DECODER
+
ENCODER
05851-
019
Figure 23. Typical Application Circuit
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