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| 型號(hào)： | AD7400AYRWZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MODULATOR SIGMA-DELTA 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類(lèi)型： | 調(diào)制器 |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 10M |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 單電源 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD7400A
Rev. D | Page 15 of 20
DIGITAL FILTER
The overall system resolution and throughput rate is deter-
mined by the filter selected and the decimation rate used. The
higher the decimation rate, the greater the system accuracy, as
illustrated in Figure 24. However, there is a tradeoff between
accuracy and throughput rate and, therefore, higher decimal-
tion rates result in lower throughput solutions.
A Sinc3 filter is recommended for use with the AD7400A. This
filter can be implemented on an FPGA or a DSP.
(
)
(
)
3
1
)
(
=
Z
z
H
DR
where DR is the decimation rate.
80
70
60
50
40
30
20
10
0
90
10
100
1k
1
DECIMATION RATE
S
NR
(
d
B)
SINC3
SINC2
SINC1
07077-
025
Figure 24. SNR vs. Decimation Rate for Different Filter Types
The following Verilog code provides an example of a Sinc3 filter
implementation on a Xilinx Spartan-II 2.5 V FPGA. This code
can possibly be compiled for another FPGA, such as an Altera
device. Note that the data is read on the negative clock edge in
this case, although it can be read on the positive edge, if preferred.
Figure 24 shows the effect of using different decimation rates
with various filter types.
/*`Data is read on negative clk edge*/
module DEC256SINC24B(mdata1, mclk1, reset,
DATA);
input
mclk1;
/*used to clk filter*/
input
reset;
/*used to reset filter*/
input
mdata1;
/*ip data to be
filtered*/
output [15:0] DATA;
/*filtered op*/
integer location;
integer info_file;
reg [23:0]
ip_data1;
reg [23:0]
acc1;
reg [23:0]
acc2;
reg [23:0]
acc3;
reg [23:0]
acc3_d1;
reg [23:0]
acc3_d2;
reg [23:0]
diff1;
reg [23:0]
diff2;
reg [23:0]
diff3;
reg [23:0]
diff1_d;
reg [23:0]
diff2_d;
reg [15:0]
DATA;
reg [7:0]
word_count;
reg word_clk;
reg init;
/*Perform the Sinc ACTION*/
always @ (mdata1)
if(mdata1==0)
ip_data1 <= 0;
/* change from a 0
to a -1 for 2's comp */
else
ip_data1 <= 1;
/*ACCUMULATOR (INTEGRATOR)
Perform the accumulation (IIR) at the speed
of the modulator.
MCLKOUT
IP_DATA1
ACC1+
ACC2+
ACC3+
+
Z
+
Z
+
Z
07077-
021
Figure 25. Accumulator
Z = one sample delay
MCLKOUT = modulators conversion bit rate
*/
always @ (negedge mclk1 or posedge reset)
if (reset)
begin
/*initialize acc registers on reset*/
acc1 <= 0;
acc2 <= 0;
acc3 <= 0;
end
else
begin
/*perform accumulation process*/
acc1 <= acc1 + ip_data1;
acc2 <= acc2 + acc1;
acc3 <= acc3 + acc2;
end
/*DECIMATION STAGE (MCLKOUT/ WORD_CLK)
*/
always @ (posedge mclk1 or posedge reset)
if (reset)
word_count <= 0;
else
word_count <= word_count + 1;
always @ (word_count)
word_clk <= word_count[7];
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參數(shù)描述 |
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| AD7400YRWZ | 功能描述:IC MODULATOR SIGMA-DELTA 16-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專(zhuān)用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類(lèi)型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤(pán) |
| AD7400YRWZ-REEL | 功能描述:IC MODULATOR SIGMA-DELTA 16-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專(zhuān)用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類(lèi)型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤(pán) |
| AD7400YRWZ-REEL7 | 功能描述:IC MODULATOR SIGMA-DELTA 16-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專(zhuān)用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類(lèi)型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤(pán) |
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