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| 型號： | AD7400AYNSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MODULATOR SIGMADELTA 8-SMD |
| 產(chǎn)品變化通告： | AD7400AYNSZ Discontinuation 23/Mar/2012 |
| 標準包裝： | 50 |
| 類型： | 調制器 |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 10M |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 單電源 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SMD，鷗翼型 |
| 供應商設備封裝： | 8-DIP 鷗翼型 |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 798 (CN2011-ZH PDF) |
Data Sheet
AD7400A
Rev. D | Page 3 of 20
SPECIFICATIONS
VDD1 = 4.5 V to 5.5 V, VDD2 = 3 V to 5.5 V, VIN+ = 200 mV to +200 mV, except where specified, and VIN = 0 V (single-ended);
TA = 40°C to +125°C, except where specified; fMCLK = 10 MHz, tested with Sinc3 filter, 256 decimation rate, as defined by Verilog code,
unless otherwise noted.
Table 1.
Y Version1
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
16
Bits
Filter output truncated to 16 bits
Integral Nonlinearity2
±2
±12
LSB
VIN+ = ±200 mV, TA = 40°C to +125°C
±4
±16
LSB
VIN+ = ±250 mV, TA = 40°C to +85°C
±4
±22
LSB
VIN+ = ±250 mV, TA = 40°C to +125°C
Differential Nonlinearity2
±0.9
LSB
Guaranteed no missing codes to 16 bits
Offset Error2
±50
±500
μV
Offset Drift vs. Temperature
1.5
4
V/°C
40°C to +125°C
Offset Drift vs. VDD1
120
V/V
Gain Error2
±1.5
mV
40°C to +85°C
±2
mV
40°C to +125°C
Gain Error Drift vs. Temperature
23
V/°C
40°C to +125°C
Gain Error Drift vs. VDD1
110
V/V
ANALOG INPUT
Input Voltage Range
250
+250
mV
For specified performance, full range = ±320 mV
Dynamic Input Current
±7
±8
A
VIN+ = 400 mV, VIN = 0 V
±9
±10
A
VIN+ = 500 mV, VIN = 0 V
±0.5
A
VIN+ = VIN = 0 V
Input Capacitance
10
pF
DYNAMIC SPECIFICATIONS
VIN+ = 35 Hz
Signal-to-Noise and Distortion (SINAD) Ratio2
70
78
dB
VIN+ = ±200 mV
68
78
dB
VIN+ = ±250 mV
Signal-to-Noise Ratio (SNR)
73
80
dB
VIN+ = ±200 mV
72
80
dB
VIN+ = ±250 mV
Total Harmonic Distortion (THD)2
84
dB
VIN+ = ±200 mV
82
dB
VIN+ = ±250 mV
Peak Harmonic or Spurious Noise (SFDR)2
86
dB
VIN+ = ±200 mV
84
dB
VIN+ = ±250 mV
Effective Number of Bits (ENOB)2
11.5
12.5
Bits
VIN+ = ±200 mV
11
12.5
Bits
VIN+ = ±250 mV
Isolation Transient Immunity2
25
30
kV/s
LOGIC OUTPUTS
Output High Voltage, VOH
VDD2 0.1
V
IO = 200 A
Output Low Voltage, VOL
0.4
V
IO = +200 A
POWER REQUIREMENTS
VDD1
4.5
5.5
V
VDD2
3
5.5
V
IDD13
11
13
mA
VDD1 = 5.5 V
IDD24
4.5
6
mA
VDD2 = 5.5 V
3
3.5
mA
VDD2 = 3.3 V
1
All voltages are relative to their respective ground.
2
See the Terminology section.
3
4
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