參數(shù)資料
型號: AD7392ARZ
廠商: Analog Devices Inc
文件頁數(shù): 19/20頁
文件大小: 0K
描述: IC DAC 12BIT PARALLEL 3V 20-SOIC
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 37
設置時間: 60µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 500µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 20-SOIC W
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 17k
產(chǎn)品目錄頁面: 784 (CN2011-ZH PDF)
AD7392/AD7393
Rev. C | Page 8 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
0
512
1024
1536
2048
2560
3072
3584
4096
AD7392
01
12
1-
00
8
CODE (Decimal)
IN
L
(
L
S
B
)
VDD = 2.7V
VREF = 2.5V
TA = 25°C
Figure 5. AD7392 Integral Nonlinearity Error vs. Code
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
AD7393
01
12
1-
00
9
CODE (Decimal)
IN
L
(
L
S
B
)
VDD = 2.7V
VREF = 2.5V
TA = 25°C
0
128
256
384
512
640
768
896
1024
Figure 6. AD7393 Integral Nonlinearity Error vs. Code
25
0
5
10
15
20
5.0
5.8
6.6
7.3
8.1
8.9
9.7
10.5 11.2 12.0
01
12
1-
01
0
TOTAL UNADJUSTED ERROR (LSB)
FR
E
Q
U
E
N
C
Y
AD7392
SS = 100 UNITS
VDD = 2.7V
VREF = 2.5V
TA = 25°C
Figure 7. AD7392 Total Unadjusted Error Histogram
100
90
80
70
60
50
40
30
20
10
0
–10
–3.3
3.3
10
16
23
30
36
43
50
01
12
1-
01
1
TOTAL UNADJUSTED ERROR (LSB)
FR
E
Q
U
E
N
C
Y
AD7393
SS = 300 UNITS
VDD = 2.7V
VREF = 2.5V
TA = 25°C
Figure 8. AD7393 Total Unadjusted Error Histogram
30
24
18
12
6
0
–66
0
–6
–12
–20
–26
–32
–40
–46
–52
–60
01
12
1-
01
2
FULL-SCALE TEMPERATURE COEFFICIENT (ppm/°C)
FR
E
Q
U
E
N
C
Y
AD7393
SS = 100 UNITS
VDD = 2.7V
VREF = 2.5V
TA = –40°C TO +85°C
Figure 9. AD7393 Full-Scale Output Temperature Coefficient Histogram
16
14
12
10
8
6
4
2
0
1
10
100
1k
10k
100k
01
12
1-
01
3
FREQUENCY (Hz)
O
U
T
P
U
T
VO
LT
A
G
E
N
O
IS
E
(V/
H
z)
AD7392
VDD = 5V
VREF = 2.5V
TA = 25°C
Figure 10. Voltage Noise Density vs. Frequency
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