±16.5V VDD/VSS <" />
參數(shù)資料
型號(hào)： AD7324BRUZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 14/37頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT+ SAR 4CHAN 16TSSOP
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 30mW
電壓電源： 雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，單極；4 個(gè)單端，雙極；2 個(gè)差分，單極；2 個(gè)差分，雙極
配用： EVAL-AD7324CBZ-ND - BOARD EVALUATION FOR AD7324CBZ
AD7324
Data Sheet
Rev. B | Page 20 of 36
±16.5V VDD/VSS
±12V VDD/VSS
5
–6
V
CO
M
RAN
G
E
(
V
)
4
3
2
1
0
–1
–2
–3
–4
–5
VCC =3V
VREF =3V
±2.5V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
±10V
RANGE
048
64-
045
Figure 35. Common-Mode Range for VCC = 3 V and REFIN/OUT = 3 V
±16.5V VDD/VSS
±12V VDD/VSS
V
CO
M
RAN
G
E
(
V
)
VCC =5V
VREF =3V
8
–4
6
4
2
0
–2
±2.5V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
±10V
RANGE
04
864
-0
46
Figure 36. Common-Mode Range for VCC = 5 V and REFIN/OUT = 3 V
6
–8
4
2
0
–2
–4
–6
±16.5V VDD/VSS
±12V VDD/VSS
V
CO
M
RA
NG
E
(
V
)
VCC =3V
VREF =2.5V
±2.5V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
±10V
RANGE
04
864
-0
47
Figure 37. Common-Mode Range for VCC = 3 V and REFIN/OUT = 2.5 V
8
–8
6
4
2
0
–2
–4
–6
±16.5V VDD/VSS
±12V VDD/VSS
V
CO
M
RAN
G
E
(
V
)
VCC =5V
VREF =2.5V
±2.5V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
±10V
RANGE
04
864
-0
48
Figure 38. Common-Mode Range for VCC = 5 V and REFIN/OUT = 2.5 V
Pseudo Differential Inputs
The AD7324 can have two pseudo differential pairs or three
pseudo differential inputs referenced to a common VIN pin.
The VIN+ inputs are coupled to the signal source and must have
an amplitude within the selected range for that channel as
programmed in the range register. A dc input is applied to the
VIN pin. The voltage applied to this input provides an offset
for the VIN+ input from ground or a pseudo ground. Pseudo
differential inputs separate the analog input signal ground from
the ADC ground, allowing cancellation of dc common-mode
voltages. Figure 39 shows the AD7324 configured in pseudo
differential mode.
When a conversion takes place, the pseudo ground corresponds
to Code 4096, and the maximum amplitude corresponds to
Code +4095.
AD73241
VIN+
V+
V–
VDD
VSS
VCC
5V
1ADDITIONAL PINS OMITTED FOR CLARITY.
VIN–
0
4864-
028
Figure 39. Pseudo Differential Inputs
Figure 40 and Figure 41 show the typical voltage range on the
VIN pin for the different analog input ranges when configured
in the pseudo differential mode.
For example, when the AD7324 is configured to operate in
pseudo differential mode and the ±5 V range is selected with
±16.5 V VDD/VSS supplies and 5 V VCC, the voltage on the VIN
pin can vary from 6.5 V to +6.5 V.
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