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參數(shù)資料
| 型號： | AD7321BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/37頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT+ SAR 2CHAN 14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 17mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極；2 個(gè)單端，雙極；1 個(gè)差分，單極；1 個(gè)差分，雙極 |
| 產(chǎn)品目錄頁面： | 777 (CN2011-ZH PDF) |
| 配用： | EVAL-AD7321CBZ-ND - BOARD EVALUATION FOR AD7321 |
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Data Sheet
AD7321
Rev. B | Page 23 of 36
CONTROL REGISTER
The control register is used to select the analog input channel, analog input configuration, reference, coding, and power mode. The
control register is a write only, 12-bit register. Data loaded on the DIN line corresponds to the AD7321 configuration for the next
conversion. Data should be loaded into the control register after the range register has been initialized. The bit functions of the control
register are shown in Table 9 (the power-up status of all bits is 0).
MSB
LSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Write
ZERO
Register Select
ZERO
ADD0
Mode 1
Mode 0
PM1
PM0
Coding
Ref
Seq1
Seq2
ZERO
0
Table 9. Control Register Details
Bit
Mnemonic
Description
12, 11, 1
ZERO
A 0 should be written to these bits at all times.
10
ADD0
This channel address bit is used to select the analog input channel for the next conversion if the sequencer
is not being used. If the sequencer is being used, the channel address bit is used to select the final channel
in a consecutive sequence.
9, 8
Mode 1, Mode 0
These two mode bits are used to select the configuration of the two analog input pins, VIN0 to VIN1. These
pins are used in conjunction with the channel address bit. On the AD7321, the analog inputs are
configured as two single-ended inputs, one true differential input pair, or one pseudo differential input
7, 6
PM1, PM0
The power management bits are used to select different power mode options on the AD7321 (see Table 11).
5
Coding
This bit is used to select the type of output coding the AD7321 uses for the next conversion result. If
coding = 0, the output coding is twos complement. If coding = 1, the output coding is straight binary.
When operating in sequence mode, the output coding for each channel is the value written to the coding
bit during the last write to the control register.
4
Ref
The reference bit is used to enable or disable the internal reference. If Ref = 0, the external reference is
enabled and used for the next conversion, and the internal reference is disabled. If Ref = 1, the internal
reference is used for the next conversion. When operating in sequence mode, the reference used for each
channel is the value written to the Ref bit during the last write to the control register.
3, 2
Seq1/Seq2
The Sequence 1 and Sequence 2 bits are used to control the operation of the sequencer (see Table 12).
The two analog input channels are configured as one pseudo differential analog input, one true differential input pair, or two single-ended
analog inputs.
Table 10. Analog Input Configuration Selection
Mode 1 = 1, Mode 0 = 1
Mode 1 = 1, Mode 0 = 0
Mode 1 = 0, Mode 0 =1
Mode 1 = 0, Mode 0 = 0
Channel Address Bit
Not Allowed
1 Fully Differential I/P
1 Pseudo Differential I/P
2 Single-Ended I/Ps
ADD0
VIN+
VIN
VIN+
VIN
VIN+
VIN
VIN+
VIN
0
–
VIN0
VIN1
VIN0
VIN1
VIN0
AGND
1
–
VIN0
VIN1
VIN0
VIN1
AGND
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