參數(shù)資料
型號: AD7321BRUZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 15/37頁
文件大?。?/td> 0K
描述: IC ADC 12BIT+ SAR 2CHAN 14TSSOP
標準包裝: 1,000
位數(shù): 12
采樣率(每秒): 500k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 17mW
電壓電源: 雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極;1 個差分,單極;1 個差分,雙極
配用: EVAL-AD7321CBZ-ND - BOARD EVALUATION FOR AD7321
Data Sheet
AD7321
Rev. B | Page 21 of 36
8
–8
6
4
2
0
–2
–4
–6
±2.5V
RANGE
±10V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
0V TO +10V
RANGE
0V TO +10V
RANGE
±16.5V VDD/VSS
±12V VDD/VSS
05399-
039
VCC = 5V
VREF = 2.5V
Figure 40. Pseudo Input Range with VCC = 5 V
±2.5V
RANGE
±10V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
0V TO +10V
RANGE
0V TO +10V
RANGE
±16.5V VDD/VSS
±12V VDD/VSS
4
–8
2
0
–2
–4
–6
05399-
040
VCC = 3V
VREF = 2.5V
Figure 41. Pseudo Input Range with VCC = 3 V
DRIVER AMPLIFIER CHOICE
In applications where the harmonic distortion and signal-to-
noise ratio are critical specifications, the analog input of the
AD7321 should be driven from a low impedance source. Large
source impedances significantly affect the ac performance of the
ADC and can necessitate the use of an input buffer amplifier.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of THD that can be
tolerated in the application. The THD increases as the source
impedance increases and performance degrades. Figure 21 and
Figure 22 show graphs of the THD vs. the analog input
frequency for various source impedances. Depending on the
input range and analog input configuration selected, the
AD7321 can handle source impedances of up to 5.5 k before
the THD starts to degrade.
Due to the programmable nature of the analog inputs on the
AD7321, the choice of op amp used to drive the inputs is a
function of the particular application and depends on the input
configuration and the analog input voltage ranges selected.
The driver amplifier must be able to settle for a full-scale step
to a 13-bit level, 0.0122%, in less than the specified acquisition
time of the AD7321. An op amp such as the AD8021 meets this
requirement when operating in single-ended mode. The AD8021
needs an external compensating NPO type of capacitor. The
AD8022 can also be used in high frequency applications where
a dual version is required. For lower frequency applications, op
amps such as the AD797, AD845, and AD8610 can be used with
the AD7321 in single-ended mode configuration.
Differential operation requires that VIN+ and VIN be
simultaneously driven with two signals of equal amplitude that
are 180° out of phase. The common mode must be set up
externally to the AD7321. The common-mode range is
determined by the REFIN/OUT voltage, the VCC supply voltage,
and the particular amplifier used to drive the analog inputs.
Differential mode with either an ac input or a dc input provides
the best THD performance over a wide frequency range. Because
not all applications have a signal preconditioned for differential
operation, there is often a need to perform the single-ended-to-
differential conversion.
This single-ended-to-differential conversion is performed using
an op amp pair. Typical connection diagrams for an op amp
common-mode signal is applied to the noninverting input of
the second amplifier.
VIN
V+
V–
3k
1.5k
1.5k
1.5k
1.5k
10k
20k
VCOM
05399-
029
AD845
Figure 42. Single-Ended-to-Differential Configuration with the AD845
VIN
V+
V–
442
442
442
442
442
100
AD8021
442
05399-
030
Figure 43. Single-Ended-to-Differential Configuration with the AD8021
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