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參數(shù)資料
| 型號： | AD7294BCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 32/49頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT I2C/SRL 1M 56LFCSP |
| 標準包裝： | 2,500 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 22.22k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.4 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD7294
Rev. H | Page 37 of 48
Writing Two Bytes of Data to a 16-Bit Register
The limit and hysteresis registers (0x0B to 0x25), the result
registers (0x01 to 0x04), and the configuration register (0x09)
are 16-bit registers; therefore, two bytes of data are required to
write a value to any one of these registers. Writing two bytes of
data to one of these registers consists of the following sequence:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts an acknowledge on SDA.
4. The master sends a register address. The slave asserts an
acknowledge on SDA.
5. The master sends the first data byte (most significant).
6. The slave asserts an acknowledge on SDA.
7. The master sends the second data byte (least significant).
8. The slave asserts an acknowledge on SDA.
9. The master asserts a stop condition on SDA to end the
transaction.
Writing to Multiple Registers
Writing to multiple address registers consists of the following:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device (AD7294) asserts an
acknowledge on SDA.
4. The master sends a register address, for example the Alert
Status Register A register address. The slave asserts an
acknowledge on SDA.
5. The master sends the data byte.
6. The slave asserts an acknowledge on SDA.
7. The master sends a second register address, for example
the configuration register. The slave asserts an
acknowledge on SDA.
8. The master sends the first data byte.
9. The slave asserts an acknowledge on SDA.
10. The master sends the second data byte.
11. The slave asserts an acknowledge on SDA.
12. The master asserts a stop condition on SDA to end the
transaction.
The previous examples detail writing to two registers only
(the Alert Status Register A and the configuration register).
However, the AD7294 can read from multiple registers in one
write operation as shown in Figure 53.
05747-
059
S
SLAVE ADDRESS
0
A
REG POINTER
A
DATA<15:8>
A
P
DATA<7:0>
A
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
A = ACKNOWLEDGE
A = NOT ACKNOWLEDGE
Figure 52. Writing Two Bytes of Data to a 16-Bit Register
05747-
054
S
SLAVE ADDRESS
0
A
POINT TO CONFIG REG (0x09)
A
DATA<15:8>
A
P
DATA<7:0>
A
POINT TO PD REG (0x0A)
DATA<7:0>
A
...
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
A = ACKNOWLEDGE
A = NOT ACKNOWLEDGE
Figure 53. Writing to Multiple Registers
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