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參數(shù)資料
| 型號： | AD7244AQ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT SRL W/REF 24-CDIP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1 |
| 設置時間： | 4µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 195mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-CDIP（0.300"，7.62mm） |
| 供應商設備封裝： | 24-CDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電壓，雙極 |
| 采樣率（每秒）： | 250k |
AD7242/AD7244
REV. A
–6–
CIRCUIT DESCRIPTION
The AD7242/AD7244 contains two 12-bit/14-bit D/A convert-
ers, each with an output buffer amplifier. The part also contains
a reference input buffer amplifier for each DAC, and an on-chip
3 V reference.
D/A Section
The AD7242/AD7244 contains two 12-bit/14-bit voltage mode
D/A converters, each consisting of highly stable thin-film resistors
and high speed single-pole, double-throw switches. The simplified
circuit diagram for the DAC section is shown in Figure 1. The
three MSBs of the data word are decoded to drive the seven
switches A-G. On the AD7242, the 9 LSBs switch a
9-bit R-2R ladder structure while on the AD7244, the 11 LSBs
switch an 11-bit R-2R ladder structure. The output voltage
from this converter has the same polarity as the reference
voltage, REF IN.
The REF IN voltage is internally buffered by a unity gain
amplifier before being applied to the D/A converters and the
bipolar bias circuitry. The D/A converter is configured and
scaled for a 3 V reference, and the device is tested with 3 V
applied to REF IN. Operating the AD7242/AD7244 at refer-
ence voltages outside the
±5% tolerance range may result in
degraded performance from the part.
Figure 1. DAC Ladder Structure
Internal Reference
The on-chip reference is a temperature-compensated buried
Zener reference that is factory trimmed for 3 V
± 10 mV. The
reference can be used to provide both the reference voltage for
the two D/A converters and the bipolar biasing circuitry. This is
achieved by connecting REF OUT to REF INA and REF INB.
The reference voltage can also be used for other components
and is capable of providing up to 500
A to an external load.
The maximum recommended capacitance on the reference
output pin for normal operation is 50 pF. If the reference
output is required to drive a capacitive load greater than 50 pF,
a 200
resistor should be placed in series with the capacitive
load. Decoupling the REF OUT pin with a series 200
resistor
and a parallel combination of a 10
F tantalum capacitor and a
0.1
F ceramic capacitor as in Figure 2 reduces the noise
spectral density of the reference (see Figure 4). Using this
decoupling scheme to generate the reference voltage for REF
INA and REF INB gives a channel-to-channel isolation number
of 110 dB (connecting REF OUT directly to REF INA and
REF INB gives 80 dB). The channel-to-channel isolation is 110
dB using an external reference.
External Reference
In some applications, the user may require a system reference or
some other external reference to drive the AD7242/AD7244
reference inputs. Figure 3 shows how the AD586 reference can
be conditioned to provide the 3 V reference required by the
AD7242/AD7244 reference inputs.
Figure 2. Circuit Connection for REF OUT with an External
Capacitive Load of Greater Than 50 pF
Figure 3. AD586 Driving AD7242/AD7244 Reference Inputs
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