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參數(shù)資料
| 型號(hào)： | AD7226KNZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT LC2MOS QUAD 20-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 設(shè)置時(shí)間： | 4µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 20-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 143k |
| 產(chǎn)品目錄頁(yè)面： | 784 (CN2011-ZH PDF) |
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REV.
–4–
AD7226
PIN CONFIGURATIONS
DIP and SOIC/SSOP
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD7226
VREF
AGND
DGND
DB7 (MSB)
DB6
A0
A1
WR
DB0(LSB)
DB5
DB4
DB3
DB2
DB1
VSS
VOUTA
VOUTBVOUTC
VOUTD
VDD
PLCC
3
2
1
20
19
9
10
11
12
13
18
17
16
15
14
4
5
6
7
8
TOP VIEW
(Not to Scale)
V REF
AGND
DGND
DB7 (MSB)
DB8
AD7226
VDD
A0
A1
WR
DB0(LSB)
DB5
DB4
DB3
DB2
DB1
V
SS
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
TERMINOLOGY
TOTAL UNADJUSTED ERROR
This is a comprehensive specification that includes full-scale
error, relative accuracy and zero code error. Maximum output
voltage is VREF – 1 LSB (ideal), where 1 LSB (ideal) is VREF/
256. The LSB size will vary over the VREF range. Hence the zero
code error will, relative to the LSB size, increase as VREF decreases.
Accordingly, the total unadjusted error, which includes the zero
code error, will also vary in terms of LSB’s over the VREF range.
As a result, total unadjusted error is specified for a fixed refer-
ence voltage of 10 V.
RELATIVE ACCURACY
Relative Accuracy or endpoint nonlinearity, is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
allowing for zero and full-scale error and is normally expressed
in LSB’s or as a percentage of full-scale reading.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
±1 LSB max over
the operating temperature range ensures monotonicity.
DIGITAL CROSSTALK
The glitch impulse transferred to the output of one converter
due to a change in the digital input code to another of the con-
verters. It is specified in nV secs and is measured at VREF = 0 V.
FULL SCALE ERROR
Full-Scale Error is defined as:
Measured Value – Zero Code Error – Ideal Value
4
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f
1
4
D
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參數(shù)描述 |
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| AD7226KP | 功能描述:IC DAC 8BIT LC2MOS QUAD 20-PLCC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7226KP-REEL | 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 8-bit 20-Pin PLCC T/R 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 8BIT 20PLCC - Tape and Reel |
| AD7226KPZ | 功能描述:IC DAC 8BIT LC2MOS QUAD 20-PLCC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD7226KPZ | 制造商:Analog Devices 功能描述:IC 8-BIT DAC |
| AD7226KPZ-REEL | 功能描述:IC DAC 8BIT QUAD W/AMP 20PLCC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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