參數(shù)資料
型號: AD6654CBCZ
廠商: Analog Devices Inc
文件頁數(shù): 56/88頁
文件大小: 0K
描述: IC ADC 14BIT W/4CH RSP 256CSPBGA
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 92.16M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.5W
電壓電源: 模擬和數(shù)字
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA,CSPBGA
供應(yīng)商設(shè)備封裝: 256-CSPBGA(17x17)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)差分,單極
AD6654
Rev. 0 | Page 6 of 88
SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Table 1.
Parameter (Conditions)
Temp
Test Level
Min
Typ
Max
Unit
Full
IV
4.75
5.0
5.25
V
Full
IV
3.0
3.3
3.6
V
VDDCORE
Full
IV
1.65
1.8
1.95
V
Full
IV
3.0
3.3
3.6
V
TAMBIENT
IV
25
+25
+85
°C
1 Specified for dc supplies with linear rise-time <250 ms.
2 DRVDD and VDDIO can be operated from the same supply.
ADC DC SPECIFICATIONS
AVDD = 5.0 V, DRVDD = 3.3 V, VDDCORE = 1.8 V, VDDIO = 3.3 V, maximum rated sample rate, differential ENC and AIN, unless
otherwise noted.
Table 2.
Parameter (Conditions)
Temp
Test Level
Min
Typ
Max
Unit
RESOLUTION
Full
IV
14
Bits
INTERNAL VOLTAGE REFERENCE (VREF)1
Output Voltage
Full
IV
2.4
V
ANALOG INPUTS
Differential Input Voltage Range
Full
IV
2.2
V p-p
Differential Input Capacitance
Full
V
1.5
pF
Differential Input Resistance
Full
V
1
k
Power Supply Rejection (PSRR)
25°C
V
±1.0
mV/V
1 VREF is provided for setting the common-mode offset of a differential amplifier such as the AD8138 when a dc-coupled analog input is required. VREF should be buffered
if used to drive additional circuit functions.
ADC DIGITAL SPECIFICATIONS
AVDD = 5.0 V, DRVDD = 3.3 V, VDDCORE = 1.8 V, VDDIO = 3.3 V, maximum rated sample rate, differential ADC input, unless
otherwise noted.
Table 3.
Parameter (Conditions)
Temp
Test Level
Min
Typ
Max
Unit
ENCODE INPUTS (ENC+, ENC)
Differential Input Voltage
Full
IV
0.4
V p-p
Differential Input Resistance
25°C
V
10
k
Differential Input Capacitance
25°C
V
2.5
pF
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