• 參數(shù)資料
    型號: AD664AD-UNI
    廠商: Analog Devices Inc
    文件頁數(shù): 5/23頁
    文件大?。?/td> 0K
    描述: IC DAC 12BIT QUAD UNIPOL 28-CDIP
    產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
    DAC Architectures
    標準包裝: 1
    設(shè)置時間: 8µs
    位數(shù): 12
    數(shù)據(jù)接口: 并聯(lián)
    轉(zhuǎn)換器數(shù)目: 4
    電壓電源: 雙 ±
    功率耗散(最大): 525mW
    工作溫度: -40°C ~ 85°C
    安裝類型: 通孔
    封裝/外殼: 28-CDIP(0.605",15.37mm)
    供應(yīng)商設(shè)備封裝: 28-CDIP
    包裝: 管件
    輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
    采樣率(每秒): 125k
    AD664
    REV.
    –13–
    Figure 25a. Simple AD664 to MC6801 Interface
    Expansion of the scheme employed in Figure 25a results in that
    shown in Figure 25c. Here, two AD664s are connected to an
    MC6801, providing a total of eight 12-bit, software program-
    mable DACs. Again, the three least significant bits of address
    are used to select the on-chip registers of the AD664. IOS and
    E, as well as a fourth address bit, are decoded to provide the
    appropriate CS signals. Four address and five I/O lines remain
    uncommitted.
    A slightly more sophisticated approach to system expansion is
    illustrated in Figure 25d. Here, a 74LS138 (1-of-8 decoder) is
    used to address one of the eight AD664s connected to the
    MC6801. The three least significant address bits are used to
    select on-chip register and DAC. The next three address bits are
    used to select the appropriate AD664. IOS and E gate the
    74LS138 output.
    Figure 25b. Alternate AD664 to MC6801 Interface
    Figure 25c. Interfacing Two AD664s to an MC6801
    D
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