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參數(shù)資料
| 型號： | AD648KRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP BIFET 1MHZ DUAL 8SOIC |
| 標準包裝： | 98 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 1.8 V/µs |
| 增益帶寬積： | 1MHz |
| 電流 - 輸入偏壓： | 3pA |
| 電壓 - 輸入偏移： | 300µV |
| 電流 - 電源： | 340µA |
| 電流 - 輸出 / 通道： | 15mA |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 18 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 管件 |
AD648
REV. E
–8–
SIGN BIT
BINARY NUMBER IN DAC REGISTER ANALOG OUTPUT
0
1111 1111 1111
+VIN
(4095/4096)
0
0000 0000 0000
0 V
1
0000 0000 0000
0 V
1
1111 1111 1111
–VIN
(4095/4096)
NOTE
SIGN BIT AT “0“ CONNECTS THE NONINVERTING INPUT OF
A2 TO ANALOG COMMON
Figure 25. Sign Magnitude Code Table
Figure 23c shows a diode clamp protection scheme for an I-to-V
converter using low leakage diodes. Because the diodes are
connected to the op amp’s summing junction, which is a virtual
ground, their leakage contribution is minimal.
Figure 23c. I-to-V Converter with Diode Input Protection
Exceeding the negative common-mode range on either input
terminal causes a phase reversal at the output, forcing the ampli-
fier output to the corresponding high or low state. Exceeding
the negative common mode on both inputs simultaneously
forces the output high. Exceeding the positive common-mode
range on a single input does not cause a phase reversal; but if
both inputs exceed the limit, the output will be forced high. In
all cases, normal amplifier operation is resumed when input
voltages are brought back within the common-mode range.
D/A CONVERTER BIPOLAR OUTPUT BUFFER
The circuit in Figure 24 provides 4 quadrant multiplication with
a resolution of 12 bits. The AD648 is used to convert the AD7545
CMOS DAC’s output current to a voltage and provides the
necessary level shifting to achieve a bipolar voltage output. The
circuit operates with a 12-bit plus sign input code. The transfer
function is shown in Figure 25.
The AD7592 is a fully protected dual CMOS SPDT switch with
data latches. R4 and R5 should match to within 0.01% to main-
tain the accuracy of the converter. A mismatch between R4 and
R5 introduces a gain error. Overall gain is trimmed by adjusting
RIN. The AD648’s low input offset voltage, low drift over tem-
perature, and excellent dynamics make it an attractive low
power output buffer.
The input offset voltage of the AD648 output amplifier results
in an output error voltage. This error voltage equals the input
offset voltage of the op amp times the noise gain of the amplifier.
That is:
VOS Output
= VOS Input 1+
RFB
RO
RFB is the feedback resistor for the op amp, which is internal to
the DAC. RO is the DAC’s R-2R ladder output resistance. The
value of RO is code dependent. This has the effect of changing
the offset error voltage at the amplifier’s output. An output
amplifier with a sub millivolt input offset voltage is needed to
preserve the linearity of the DAC’s transfer function.
Figure 24. 12-Bit Plus Sign Magnitude D/A Converter
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD648KRZ-REEL | 功能描述:IC OPAMP BIFET 1MHZ DUAL 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:150 系列:- 放大器類型:音頻 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:5 V/µs 增益帶寬積:12MHz -3db帶寬:- 電流 - 輸入偏壓:100nA 電壓 - 輸入偏移:500µV 電流 - 電源:6mA 電流 - 輸出 / 通道:50mA 電壓 - 電源，單路/雙路(±):4 V ~ 32 V，±2 V ~ 16 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:8-TSSOP 包裝:管件 |
| AD648KRZ-REEL7 | 功能描述:IC OPAMP BIFET 1MHZ DUAL 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:150 系列:- 放大器類型:音頻 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:5 V/µs 增益帶寬積:12MHz -3db帶寬:- 電流 - 輸入偏壓:100nA 電壓 - 輸入偏移:500µV 電流 - 電源:6mA 電流 - 輸出 / 通道:50mA 電壓 - 電源，單路/雙路(±):4 V ~ 32 V，±2 V ~ 16 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:8-TSSOP 包裝:管件 |
| AD648S | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Precision, Low Power BiFET Op Amp |
| AD648SCHIPS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Precision, Low Power BiFET Op Amp |
| AD648SH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Operational Amplifier |
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