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參數(shù)資料
| 型號： | AD6459ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | GSM 3 V Receiver IF Subsystem |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封裝： | PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 314K |
| 代理商： | AD6459ARS |
–2–
REV. 0
AD6459–SPECIFICATIONS
Model
Parameter
AD6459ARS
Typ
Conditions
Min
Max
Units
DYNAMIC PERFORMANCE
MIXER
Maximum RF and LO Frequency
AGC Conversion Gain Variation
Input 1 dB Compression Point
Input Third-Order Intercept
SSB Noise Figure
1
Mixer Output Bandwidth at MXOP
500
–3 to +16
–11
0
10
80
MHz
dB
dBm
dBm
dB
MHz
0.2 V < V
GAIN
< 2.25 V
@ V
GAIN
= 0.2 V
@ V
GAIN
= 0.2 V
@ Z
S
= 50
, F
RF
= 240 MHz, F
LO
= 229.3 MHz at –16 dBm
@ –3 dB
IF AMPLIFIERS
AGC Gain Variation
Input Referred Noise
Input Resistance
Bandwidth
0.2 V < V
GAIN
<2.25 V
AC Short Circuit Input
@ V
GAIN
= 0.2 V
@ –3 dB
–13 to +46
3
5
50
dB
nV/
√
Hz
k
MHz
I AND Q DEMODULATORS
Demodulation Gain
Output Voltage Range
Output Voltage Common-Mode Level
Output Offset Voltage
Error in Quadrature
Amplitude Match
I/Q Output Bandwidth
Output Resistance
17
dB
Differential, IRXP, IRXN, QRXP, QRXN
(Not Power Supply Dependent)
Differential, V
GAIN
= GREF
Differential from I to Q, IF = 13 MHz
I to Q
C
LOAD
= 10 pF
Each Pin
0.3
V
P
– 0.2 V
1.5
V
mV
Degree
dB
MHz
k
–150
150
3.5
1.5
0.25
2
4.7
GAIN CONTROL
Total Gain Control Range
Control Voltage Range at GAIN
Gain Scaling
Gain Law Conformance
Bias Current at GREF
Input Resistance at GAIN
Mixer + IF + Demod, 0.2 V < V
GAIN
<2.25 V
76
dB
V
mV/dB
dB
μ
A
k
0.2
23
2.4
32
27
±
0.5
0.5
20
PLL
Frequency Range
Phase Noise
Acquisition Time
Input Drive Level (FREF)
5
50
MHz
Degree rms
μ
s
mV
0.5
80
IF = 19.5 MHz, Using Suggested Filter
100
VPOS
POWER-DOWN INTERFACE
Logical Threshold
Input Current for Logical High
Turn-On Response Time
Turn-Off Response time
Standby Current
Power Up on Logical High
1.5
75
80
1
2
V
μ
A
μ
s
μ
s
μ
A
To Fully Meet Specifications (PLL Lock)
To 200
μ
A Supply Current
POWER SUPPLY
Supply Range
Supply Current
2.7
5.5
V
mA
@ V
GAIN
= 1.2 V
8
OPERATING TEMPERATURE
T
MIN
to T
MAX
Operation to 3.3 V Minimum Supply Voltage
Operation to 2.7 V Minimum Supply Voltage
–40
–25
+85
+85
°
C
°
C
NOTES
1
Including IF noise and using suggested filter, at V
GAIN
= 0.2 V.
Specifications subject to change without notice.
(@ T
A
= +25
8
C, V
P
= 3.0 V, GREF = 1.2 V, unless otherwise noted)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AD6459ARS-REEL | 制造商:Analog Devices 功能描述:RF Receiver N-QAM/N-PSK/TDMA 3.3V/5V 20-Pin SSOP T/R |
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| AD645AH | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise, Low Drift FET Op Amp |
| AD645B | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise, Low Drift FET Op Amp |
| AD645BH | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise, Low Drift FET Op Amp |
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