參數(shù)資料
型號(hào): AD6458ARS
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: GSM 3 V Receiver IF Subsystem
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO20
封裝: SSOP-20
文件頁數(shù): 2/12頁
文件大?。?/td> 268K
代理商: AD6458ARS
–2–
REV. 0
AD6458–SPECIFICATIONS
(@ T
A
= +25
8
C, V
P
= 3.0 V, GREF = 1.2 V, unless otherwise noted)
Parameter
Conditions
Min
Typ
Max
Units
MIXER
Maximum RF and LO Frequency
AGC Conversion Gain Variation
Input RF Signal Range
Input 1 dB Compression Point
Input Third-Order Intercept
SSB Noise Figure
1
Mixer Output Bandwidth at MXOP
400
–8.5 to +9.5
MHz
dB
dBm
dBm
dBm
dB
MHz
0.2 V < V
G
< 2.25 V, Z
S
= 50
, Z
LOAD
= 330
–95
–15
@ V
G
= 0.2 V, Z
S
= 50
, Z
LOAD
= 330
@ V
G
= 0.2 V, Z
S
= 50
, Z
LOAD
= 330
@ Z
S
=1 k
, F
RF
= 83 MHz, F
LO
= 96 MHz at –16 dBm
@ –3 dB, Z
LOAD
= 330
–11
–2
9
55
IF AMPLIFIERS
AGC Gain Variation
Input Referred Noise
Input Resistance
Bandwidth
0.2 V < V
G
< 2.25 V
AC Short Circuit Input
@ V
G
= 0.2 V
@ –3 dB
–9 to +48
3
5
50
dB
nV/Hz
k
MHz
I AND Q DEMODULATORS
Demodulation Gain
Output Voltage Range
Output Voltage Common-Mode Level
Output Offset Voltage
Output Offset Voltage Variation
Output Offset Voltage Variation
17
dB
V
V
mV
mV
IRXP, IRXN, QRXP, QRXN
(Not Power Supply Dependant)
Differential
Differential, over Gain and Temperature Range
2
Differential, for 0.5 V < V
G
< 2.4 V and
–25
°
C < T
A
< +85
°
C (See Note 2)
IF = 13 MHz
0.3
V
P
– 0.2
1.5
–150
+150
1
0.5
1.5
0.25
2
4.7
mV
Degree
dB
MHz
k
Error in Quadrature
Amplitude Match
I/Q Output Bandwidth
Output Resistance
3.7
C
LOAD
= 10 pF
Each Pin
GAIN CONTROL
Total Gain Control Range
Control Voltage Range at GAIN
Gain Scaling
Gain Law Conformance
Bias Current at GREF
Input Resistance at GAIN
Mixer + IF + Demod, 0.2 V < V
G
< 2.25 V
75
dB
V
mV/dB
dB
μ
A
k
0.2
23
2.4
32
27
±
0.5
0.5
20
PLL
Frequency Range
Phase Noise
Acquisition Time
Input Drive Level (FREF)
5
40
MHz
Degree rms
μ
s
mV
0.5
80
IF = 13 MHz, Using Ceramic Filter
100
VPOS
POWER-DOWN INTERFACE
Logical Threshold
Input Current for Logical High
Turn On Response Time
Stand By Current
Power-Up On Logical High
1.5
75
80
1
V
μ
A
μ
s
μ
A
To Fully Meet Specifications
(See Note 3)
150
8
POWER SUPPLY
Supply Range
Worst Case Supply Current
Supply Current
3.0
3.3
16.5
9
3.6
22
V
mA
mA
@ V
GAIN
= 0.2 V, T
A
= +85
°
C, V
P
= 3.6 V
4
@ V
GAIN
= 1.2 V
OPERATING TEMPERATURE
T
MIN
to T
MAX
–40 to +85
°
C
NOTES
1
Including IF noise and using 13 MHz ceramic filter, at V
GAIN
= 0.2 V.
2
Histograms of Demodulator Offset Voltage Variation in Gain and Temperature can be found in Figures 23 to 27.
3
Max value represent the value at six times the standard deviation, in the worst case condition (T
A
= +85
°
C). The value at three times the standard deviation is 5
μ
A.
4
Max value represent the value at six times the standard deviation. The value at three times the standard variation is 19 mA.
Specifications subject to change without notice.
相關(guān)PDF資料
PDF描述
AD6459 GSM 3 V Receiver IF Subsystem
AD6459ARS GSM 3 V Receiver IF Subsystem
AD6630 Differential, Low Noise IF Gain Block with Output Clamping(差分,低噪聲中頻增益塊)
AD6650 Diversity IF to Baseband GSM/EDGE Narrowband Receiver
AD6650PCB Diversity IF to Baseband GSM/EDGE Narrowband Receiver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD6459 制造商:AD 制造商全稱:Analog Devices 功能描述:GSM 3 V Receiver IF Subsystem
AD6459ARS 制造商:Analog Devices 功能描述:RF Receiver N-QAM/N-PSK/TDMA 3.3V/5V 20-Pin SSOP
AD6459ARS-REEL 制造商:Analog Devices 功能描述:RF Receiver N-QAM/N-PSK/TDMA 3.3V/5V 20-Pin SSOP T/R
AD645A 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise, Low Drift FET Op Amp
AD645AH 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise, Low Drift FET Op Amp