V
參數(shù)資料
型號(hào)： AD627BRZ-R7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/25頁(yè)
文件大?。?/td> 0K
描述： IC AMP INST R-R 80MHZ DL 8SOIC
產(chǎn)品培訓(xùn)模塊： Power Line Monitoring
標(biāo)準(zhǔn)包裝： 1
放大器類(lèi)型： 儀表
電路數(shù)： 1
輸出類(lèi)型： 滿(mǎn)擺幅
轉(zhuǎn)換速率： 0.06 V/µs
-3db帶寬： 80kHz
電流 - 輸入偏壓： 2nA
電壓 - 輸入偏移： 25µV
電流 - 電源： 60µA
電流 - 輸出 / 通道： 25mA
電壓 - 電源，單路/雙路(±)： 2.2 V ~ 36 V，±1.1 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 標(biāo)準(zhǔn)包裝
其它名稱(chēng)： AD627BRZ-R7DKR
Data Sheet
AD627
Rev. E | Page 17 of 24
Table 7. Maximum Gain for Low Common-Mode, Single-Supply Applications
VIN
REF Pin
Supply Voltage
RG (1% Tolerance)
Resulting Maximum Gain
Output Swing WRT 0 V
±100 mV, VCM = 0 V
2 V
5 V to 15 V
28.7 kΩ
12.0
0.8 V to 3.2 V
±50 mV, VCM = 0 V
2 V
5 V to 15 V
10.7 kΩ
23.7
0.8 V to 3.2 V
±10 mV, VCM = 0 V
2 V
5 V to 15 V
1.74 kΩ
119.9
0.8 V to 3.2 V
V = 0 V, V+ = 0 V to 1 V
1 V
10 V to 15 V
78.7 kΩ
7.5
1 V to 8.5 V
V = 0 V, V+ = 0 mV to 100 mV
1 V
5 V to 15 V
7.87 kΩ
31
1 V to 4.1 V
V = 0 V, V+ = 0 mV to 10 mV
1 V
5 V to 15 V
787 Ω
259.1
1 V to 3.6 V
Table 8. RTI Error Sources
Maximum Total RTI Offset Error (μV)
Maximum Total RTI Offset Drift (μV/°C)
Total RTI Noise (nV/√Hz)
Gain
+5
450
250
5
3
52
+10
350
200
4
2
42
+20
300
175
3.5
1.5
39
+50
270
160
3.2
1.2
38
+100
270
155
3.1
1.1
38
+500
252
151
3
1
38
+1000
251
151
3
1
38
Table 7 gives values for the maximum gain for various single-
supply input conditions. The resulting output swings refer to
0 V. To maximize the available gain and output swing, set the
voltages on the REF pins to either 2 V or 1 V. In most cases,
there is no advantage to increasing the single supply to greater
than 5 V (the exception is an input range of 0 V to 1 V).
OUTPUT BUFFERING
The AD627 is designed to drive loads of 20 k or greater but
can deliver up to 20 mA to heavier loads at lower output voltage
swings (see Figure 10). If more than 20 mA of output current is
required at the output, buffer the AD627 output with a precision
op amp, such as the OP113. Figure 40 shows this for a single
supply. This op amp can swing from 0 V to 4 V on its output
while driving a load as small as 600 .
VIN
RG
+VS
–VS
AD627
0.1F
–VS
VOUT
REF
0.1F
OP113
00782-
038
Figure 40. Output Buffering
INPUT AND OUTPUT OFFSET ERRORS
The low errors of the AD627 are attributed to two sources,
input and output errors. The output error is divided by G when
referred to the input. In practice, input errors dominate at high
gains and output errors dominate at low gains. The total offset
error for a given gain is calculated as
Total Error RTI = Input Error + (Output Error/Gain)
(5)
Total Error RTO = (Input Error × G) + Output Error
(6)
RTI offset errors and noise voltages for different gains are listed
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