參數(shù)資料
型號: AD624SD
廠商: Analog Devices Inc
文件頁數(shù): 6/17頁
文件大?。?/td> 0K
描述: IC AMP INST 25MHZ PREC LN 16CDIP
標準包裝: 1
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 5 V/µs
增益帶寬積: 25MHz
-3db帶寬: 1MHz
電流 - 輸入偏壓: 50nA
電壓 - 輸入偏移: 75µV
電流 - 電源: 3.5mA
電壓 - 電源,單路/雙路(±): ±6 V ~ 18 V
工作溫度: -55°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應商設(shè)備封裝: 16-CDIP 側(cè)面銅焊
包裝: 管件
REV. C
AD624
–13–
WEIGH SCALE
Figure 44 shows an example of how an AD624 can be used to
condition the differential output voltage from a load cell. The
10% reference voltage adjustment range is required to accom-
modate the 10% transducer sensitivity tolerance. The high
linearity and low noise of the AD624 make it ideal for use in
applications of this type particularly where it is desirable to
measure small changes in weight as opposed to the absolute
value. The addition of an autogain/autotare cycle will enable the
system to remove offsets, gain errors, and drifts making possible
true 14-bit performance.
G100
G200
G500
RG2
AD624
+INPUT
–INPUT
R5
3M
R6
100k
ZERO ADJUST
(COARSE)
A/D
CONVERTER
+10V FULL
SCALE
OUTPUT
REFERENCE
SENSE
GAIN = 500
R4
10k
ZERO
ADJUST
(FINE)
100
R3
10
+15V
R1
30k
NOTE 2
10V
10%
R2
20k
R3
10k
SCALE
ERROR
ADJUST
AD584
+10V
+5V
+2.5V
VBG
TRANSDUCER
SEE NOTE 1
NOTES
1. LOAD CELL TEDEA MODEL 1010 10kG. OUTPUT 2mV/V 10%.
2. R1, R2 AND R3 SELECTED FOR AD584. OUTPUT 10V
10%.
+15V
AD707
2N2219
R7
100k
OUT
Figure 44. AD624 Weigh Scale Application
AC BRIDGE
Bridge circuits which use dc excitation are often plagued by
errors caused by thermocouple effects, l/f noise, dc drifts in the
electronics, and line noise pickup. One way to get around these
problems is to excite the bridge with an ac waveform, amplify
the bridge output with an ac amplifier, and synchronously
demodulate the resulting signal. The ac phase and amplitude
information from the bridge is recovered as a dc signal at the
output of the synchronous demodulator. The low frequency
system noise, dc drifts, and demodulator noise all get mixed to
the carrier frequency and can be removed by means of a low-
pass filter. Dynamic response of the bridge must be traded off
against the amount of attenuation required to adequately sup-
press these residual carrier components in the selection of the
filter.
Figure 45 is an example of an ac bridge system with the AD630
used as a synchronous demodulator. The oscilloscope photo-
graph shows the results of a 0.05% bridge imbalance caused by
the 1 Meg resistor in parallel with one leg of the bridge. The top
trace represents the bridge excitation, the upper middle trace is
the amplified bridge output, the lower-middle trace is the out-
put of the synchronous demodulator and the bottom trace is the
filtered dc system output.
This system can easily resolve a 0.5 ppm change in bridge
impedance. Such a change will produce a 6.3 mV change in the
low-pass filtered dc output, well above the RTO drifts and noise.
The AC-CMRR of the AD624 decreases with the frequency of
the input signal. This is due mainly to the package-pin capaci-
tance associated with the AD624’s internal gain resistors. If
AC-CMRR is not sufficient for a given application, it can be
trimmed by using a variable capacitor connected to the amplifier’s
RG2 pin as shown in Figure 45.
AD624C
–VS
+VS
VOUT
G = 1000
RG1
RG2
10k
1kHz
BRIDGE
EXCITATION
1M
1k
4–49pF
CERAMIC ac
BALANCE
CAPACITOR
–V
10k
B
10k
5k
2.5k
–VS
PHASE
SHIFTER
AD630
MODULATED
OUTPUT
SIGNAL
+VS
MODULATION
INPUT
CARRIER
INPUT
2.5k
B
A
COMP
Figure 45. AC Bridge
0V
BRIDGE EXCITATION
(20V/div) (A)
AMPLIFIED BRIDGE
OUTPUT (5V/div) (B)
DEMODULATED BRIDGE
OUTPUT (5V/div) (C)
FILTER OUTPUT
2V/div) (D)
2V
Figure 46. AC Bridge Waveforms
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