參數(shù)資料
型號: AD5765BSUZ
廠商: Analog Devices Inc
文件頁數(shù): 4/28頁
文件大小: 0K
描述: IC DAC 16BIT +/-5V QUAD 2LSB 32L
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5763/65 Metal Layer Edit Change 08/Sept/2009
設(shè)計資源: High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5765 (CN0073)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 8µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 雙 ±
功率耗散(最大): 76mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 4 電壓,雙極
采樣率(每秒): *
AD5765
Data Sheet
Rev. C | Page 12 of 28
Pin No.
Mnemonic
Description
19
VOUTC
Analog Output Voltage of DAC C. This provides buffered output with a nominal full-scale output range of ±4.096 V. The
output amplifier is capable of directly driving a 5 k, 200 pF load.
20
AGNDC
Ground Reference Pin for the DAC C Output Amplifier.
21
AGNDB
Ground Reference Pin for the DAC B Output Amplifier.
22
VOUTB
Analog Output Voltage of DAC B. This provides buffered output with a nominal full-scale output range of ±4.096 V. The
output amplifier is capable of directly driving a 5 k, 200 pF load.
23
VOUTA
Analog Output Voltage of DAC A. This provides buffered output with a nominal full-scale output range of ±4.096 V. The
output amplifier is capable of directly driving a 5 k, 200 pF load.
24
AGNDA
Ground Reference Pin for the DAC A Output Amplifier.
25
REFAB
External Reference Voltage Input for Channel A and Channel B. The reference input range is 1 V to 2.1 V; this
programs the full-scale output voltage. VREFIN = 2.048 V for specified performance.
26
REFCD
External Reference Voltage Input for Channel C and Channel D. The reference input range is 1 V to 2.1 V; this
programs the full-scale output voltage. VREFIN = 2.048 V for specified performance.
27
NC
No Connect.
28
REFGND
Reference Ground Return for the Reference Generator and Buffers.
29
TEMP
This pin provides an output voltage proportional to temperature. The output voltage is 1.4 V, typical, at 25°C die
temperature; variation with temperature is 5 mV/°C.
32
BIN/2sCOMP
Determines the DAC Coding. This pin should be hardwired to either DVCC or DGND. When hardwired to DVCC, input
coding is offset binary. When hardwired to DGND, input coding is twos complement
1
Internal pull-up device on this logic input. Therefore, it can be left floating and defaults to a logic high condition.
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