參數(shù)資料
型號(hào): AD5764RBSUZ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
中文描述: SERIAL INPUT LOADING, 8 us SETTLING TIME, 16-BIT DAC, PQFP32
封裝: ROHS COMPLIANT, PLASTIC, MS-026ABA, TQFP-32
文件頁(yè)數(shù): 26/32頁(yè)
文件大?。?/td> 524K
代理商: AD5764RBSUZ
AD5764R
OFFSET AND GAIN ADJUSTMENT WORKED
EXAMPLE
Using the information provided in the previous section, the
following worked example demonstrates how the AD5764R
functions can be used to eliminate both offset and gain errors.
As the AD5764R is factory calibrated, offset and gain errors
should be negligible. However, errors can be introduced by the
system that the AD5764R is operating within, for example, a
voltage reference value that is not equal to +5 V introduces a
gain error. An output range of ±10 V and twos complement
data coding is assumed.
Rev. PrA | Page 26 of 32
Removing Gain Error
The AD5764R can eliminate a gain error at negative full-scale
output in the range of 9.77 mV to +9.46 mV with a step size of
of a 16-bit LSB.
Calculate the step size of the gain adjustment
μV
Size
Step
Adjust
Gain
59
.
152
2
2
20
16
=
×
=
Measure the gain error by programming 0x8000 to the data
register and measuring the resulting output voltage. The gain
error is the difference between this value and 10 V, for this
example, the gain error is 1.2 mV.
Removing Offset Error
The AD5764R can eliminate an offset error in the range of 4.88
mV to +4.84 mV with a step size of of a 16-bit LSB.
How many gain adjustment steps does this value represent
Steps
μV
mV
59
.
Size
Step
Gain
Value
Gain
Measured
Steps
of
Number
8
152
2
=
=
=
Calculate the step size of the offset adjustment,
μV
Size
Step
Adjust
Offset
14
.
38
8
2
20
16
=
×
=
The gain error measured is negative (in terms of magnitude);
therefore, a positive adjustment of eight steps is required. The
gain register is 6 bits wide and the coding is twos complement,
the required gain register value can be determined as follows:
Measure the offset error by programming 0x0000 to the data
register and measuring the resulting output voltage, for this
example the measured value is +614 μV.
Convert adjustment value to binary; 001000.
How many offset adjustment steps does this value represent
The value to be programmed to the gain register is simply this
binary number.
Steps
μV
μV
Size
Step
Offset
Value
Offset
Measured
Steps
of
Number
16
14
.
38
614
=
=
=
The offset error measured is positive, therefore, a negative
adjustment of 16 steps is required. The offset register is 8 bits
wide and the coding is twos complement. The required offset
register value can be calculated as follows:
Convert adjustment value to binary; 00010000.
Convert this to a negative twos complement number by
inverting all bits and adding 1; 11110000.
11110000 is the value that should be programmed to the offset
register.
Note:
This twos complement conversion is not necessary in the
case of a positive offset adjustment. The value to be
programmed to the offset register is simply the binary
representation of the adjustment value.
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AD5765 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete Quad, 16-Bit, High Accuracy, Serial Input, ±5V DACs