參數(shù)資料
型號(hào)： AD5764R
廠(chǎng)商： Analog Devices, Inc.
英文描述： Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
中文描述： 完整的四，16位，高精度，串行輸入，雙極性電壓輸出DAC
文件頁(yè)數(shù)： 29/32頁(yè)
文件大?。?/td> 524K
代理商： AD5764R
AD5764R
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consider-
ation of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5764R is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the AD5764R is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
The AD5764R should have ample supply bypassing of 10 μF in
parallel with 0.1 μF on each supply located as close to the
package as possible, ideally right up against the device. The 10
μF capacitors are the tantalum bead type. The 0.1 μF capacitor
should have low effective series resistance (ESR) and low
effective series inductance (ESI) such as the common ceramic
types, which provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
Rev. PrA | Page 29 of 32
The power supply lines of the AD5764R should use as large a
trace as possible to provide low impedance paths and reduce
the effects of glitches on the power supply line. Fast switching
signals, such as clocks, should be shielded with digital ground
to avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. A ground line routed
between the SDIN and SCLK lines helps reduce cross-talk
between them (not required on a multilayer board, which has a
separate ground plane, however, it is helpful to separate the
lines). It is essential to minimize noise on the reference inputs,
because it couples through to the DAC output. Avoid crossover
of digital and analog signals. Traces on opposite sides of the
board should run at right angles to each other. This reduces the
effects of feed through on the board. A microstrip technique is
recommended, but not always possible with a double-sided
board. In this technique, the component side of the board is
dedicated to ground plane, while signal traces are placed on the
solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that might occur.
Isocouplers provide voltage isolation in excess of 2.5 kV. The
serial loading structure of the AD5764R makes it ideal for
isolated interfaces, because the number of interface lines is kept
to a minimum. Figure 40 shows a 4-channel isolated interface
to the AD5764R using an ADuM1400. For more information,
go to www.analog.com.
V
IA
SERIAL CLOCK OUT
TO SCLK
V
OA
ENCODE
DECODE
V
IB
SERIAL DATA OUT
TO SDIN
V
OB
ENCODE
DECODE
V
IC
SYNC OUT
TO SYNC
V
OC
ENCODE
DECODE
V
ID
CONTROL OUT
TO LDAC
V
OD
ENCODE
DECODE
μCONTROLLER
ADuM1400
1
1
ADDITIONAL PINS OMITTED FOR CLARITY
0
Figure 40. Isolated Interface
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5764R is via a serial bus
that uses standard protocol compatible with microcontrollers
and DSP processors. The communications channel is a 3-wire
(minimum) interface consisting of a clock signal, a data signal,
and a synchronization signal. The AD5764R requires a 24-bit
data-word with data valid on the falling edge of SCLK.
For all the interfaces, the DAC output update can be done
automatically when all the data is clocked in, or it can be done
under the control of LDAC. The contents of the DAC register
can be read using the readback function.
AD5764R to MC68HC11 Interface
Figure 41 shows an example of a serial interface between the
AD5764R and the MC68HC11 microcontroller. The serial
peripheral interface (SPI) on the MC68HC11 is configured for
master mode (MSTR = 1), clock polarity bit (CPOL = 0), and the
clock phase bit (CPHA = 1). The SPI is configured by writing to the
SPI control register (SPCR) (see the
68HC11User Manual)
. SCK of
the MC68HC11 drives the SCLK of the AD5764R, the MOSI
output drives the serial data line (DIN) of the AD5764R, and the
MISO input is driven from SDO. The SYNC is driven from one of
the port lines, in this case PC7.
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