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參數(shù)資料
| 型號： | AD5755BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT QUAD 64-LFCSP |
| 視頻文件： | AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC |
| 標準包裝： | 750 |
| 設(shè)置時間： | 11µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，4 電壓 |
| 采樣率（每秒）： | * |
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AD5755
Data Sheet
Rev. C | Page 14 of 52
Pin No.
Mnemonic
Description
15
ALERT
Active High Output. This pin is asserted when there has been no SPI activity on the interface pins for a
predetermined time. See the Device Features section for more information.
16
FAULT
Active Low Output. This pin is asserted low when an open circuit in current mode is detected, a short circuit in
voltage mode is detected, a PEC error is detected, or an overtemperature is detected (see the Device Features
section). Open-drain output.
17
POC
Power-On Condition. This pin determines the power-on condition and is read during power-on or, alternatively,
after a device reset. If POC = 0, the device is powered up with the voltage and current channels in tristate mode.
If POC = 1, the device is powered up with a 30 k pull-down resistor to ground on the voltage output channel,
and the current channel is in tristate mode.
18
RESET
Hardware Reset, Active Low Input.
19
AVDD
Positive Analog Supply. The voltage range is from 9 V to 33 V.
20
COMPLV_A
Optional Compensation Capacitor Connection for VOUT_A Output Buffer. Connecting a 220 pF capacitor between
this pin and the VOUT_A pin allows the voltage output to drive up to 2 F. Note that the addition of this capacitor
reduces the bandwidth of the output amplifier, increasing the settling time.
21
VSENSE_A
Sense Connection for the Negative Voltage Output Load Connection for VOUT_A. This pin must stay within ±3.0 V
of AGND for specified operation.
22
+VSENSE_A
Sense Connection for the Positive Voltage Output Load Connection for VOUT_A.
23
COMPDCDC_A
DC-to-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of the Channel A dc-to-dc converter. Alternatively, if using an external compensation resistor,
place a resistor in series with a capacitor to ground from this pin (see the DC-to-DC Converter Compensation
Capacitors and the AICC Supply Requirements—Slewing sections in the Device Features section for more
information).
24
VBOOST_A
Supply for Channel A Current Output Stage (see Figure 72). This is also the supply for the VOUT_x stage, which is
regulated to 15 V by the dc-to-dc converter. To use the dc-to-dc feature of the device, connect as shown in
25
VOUT_A
Buffered Analog Output Voltage for DAC Channel A.
26
IOUT_A
Current Output Pin for DAC Channel A.
27
AVSS
Negative Analog Supply Pin. Voltage range is from 10.8 V to 26.4 V.
28
COMPLV_B
Optional Compensation Capacitor Connection for VOUT_B Output Buffer. Connecting a 220 pF capacitor between
this pin and the VOUT_B pin allows the voltage output to drive up to 2 F. Note that the addition of this capacitor
reduces the bandwidth of the output amplifier, increasing the settling time.
29
VSENSE_B
Sense Connection for the Negative Voltage Output Load Connection for VOUT_B. This pin must stay within ±3.0 V
of AGND for specified operation.
30
+VSENSE_B
Sense Connection for the Positive Voltage Output Load Connection for VOUT_B.
31
VOUT_B
Buffered Analog Output Voltage for DAC Channel B.
32
COMPDCDC_B
DC-to-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of the Channel B dc-to-dc converter. Alternatively, if using an external compensation resistor,
place a resistor in series with a capacitor to ground from this pin (see the DC-to-DC Converter Compensation
Capacitors and the AICC Supply Requirements—Slewing sections in the Device Features section for more
information).
33
IOUT_B
Current Output Pin for DAC Channel B.
34
VBOOST_B
Supply for Channel B Current Output Stage (see Figure 72). This is also the supply for the VOUT_x stage, which is
regulated to 15 V by the dc-to-dc converter. To use the dc-to-dc feature of the device, connect as shown in
35
AGND
Ground Reference Point for Analog Circuitry. This must be connected to 0 V.
36
SWB
Switching Output for Channel B DC-to-DC Circuitry. To use the dc-to-dc feature of the device, connect as shown
37
GNDSWB
Ground Connection for DC-to-DC Switching Circuit. This pin should always be connected to ground.
38
GNDSWA
Ground Connection for DC-to-DC Switching Circuit. This pin should always be connected to ground.
39
SWA
Switching Output for Channel A DC-to-DC Circuitry. To use the dc-to-dc feature of the device, connect as shown
40
AVSS
Negative Analog Supply Pin. The voltage range is from 10.8 V to 26.4 V
41
SWD
Switching Output for Channel D DC-to-DC Circuitry. To use the dc-to-dc feature of the device, connect as shown
42
GNDSWD
Ground Connections for DC-to-DC Switching Circuit. This pin should always be connected to ground.
43
GNDSWC
Ground Connections for DC-to-DC Switching Circuit. This pin should always be connected to ground.
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| AD5757ACPZ | 功能描述:IC DAC 16BIT QUAD 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD5757ACPZ-REEL7 | 功能描述:IC DAC 16BIT QUAD IOUT 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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