參數(shù)資料
型號(hào)： AD5749ACPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 15/28頁(yè)
文件大?。?/td> 0K
描述： IC CURRENT OUT DVR 32-LFCSP
標(biāo)準(zhǔn)包裝： 1
放大器類型： 儀表
電路數(shù)： 1
電流 - 電源： 5.2mA
電流 - 輸出 / 通道： 24mA
電壓 - 電源，單路/雙路(±)： 10.8 V ~ 55 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ（5x5）
包裝： 托盤
AD5749
Data Sheet
Rev. B | Page 22 of 28
DETAILED DESCRIPTION OF FEATURES
OUTPUT FAULT ALERT—SOFTWARE MODE
In software mode, the AD5749 is equipped with one FAULT
pin; this is an open-drain output allowing several AD5749
devices to be connected together to one pull-up resistor for
global fault detection. In software mode, the FAULT pin is
forced active low by any one of the following fault scenarios:
The voltage at IOUT attempts to rise above the compliance
range due to an open-loop circuit or insufficient power
supply voltage. The internal circuitry that develops the
fault output avoids using a comparator with window
limits because this requires an actual output error before
the fault output becomes active. Instead, the signal is
generated when the internal amplifier in the output stage
has less than approximately 1 V of remaining drive capa-
bility. Thus, the fault output activates slightly before the
compliance limit is reached. Because the comparison is
made within the feedback loop of the output amplifier, the
output accuracy is maintained by its open-loop gain, and
an output error does not occur before the fault output
becomes active.
An interface error is detected due to the packet error
checking failure (PEC). See the Packet Error Checking
section.
The core temperature of the AD5749 exceeds approxi-
mately 150°C.
OUTPUT FAULT ALERT—HARDWARE MODE
In hardware mode, the AD5749 is equipped with two fault pins:
IFAULT and TEMP. These are open-drain outputs allowing
several AD5749 devices to be connected together to one pull-up
resistor for global fault detection. In hardware control mode,
these fault pins are forced active by any one of the following
fault scenarios:
An open-circuit is detected. The voltage at IOUT attempts
to rise above the compliance range, due to an open-loop
circuit or insufficient power supply voltage. The internal
circuitry that develops the fault output avoids using a
comparator with window limits because this requires an
actual output error before the fault output becomes active.
Instead, the signal is generated when the internal amplifier
in the output stage has less than approximately 1 V of
remaining drive capability. Thus, the fault output activates
slightly before the compliance limit is reached. Because the
comparison is made within the feedback loop of the output
amplifier, the output accuracy is maintained by its open-
loop gain, and an output error does not occur before the
fault output becomes active. If this fault is detected, the
IFAULT pin is forced low.
The core temperature of the AD5749 exceeds approx-
imately 150°C. If this fault is detected, the TEMP pin is
forced low.
ASYNCHRONOUS CLEAR (CLEAR)
CLEAR is an active high clear that allows the output to be
cleared to either zero-scale or midscale, and is user-selectable
via the CLRSEL pin or the CLRSEL bit of the input shift register,
as described in Table 8. (The clear select feature is a logical
OR function of the CLRSEL pin and the CLRSEL bit). When
the CLEAR signal is returned low, the output returns to its
programmed value or to a new programmed value. A clear
operation can also be performed via the clear command in
the control register.
Table 11. CLRSEL Options
CLRSEL
Output Clear Value
0
Zero scale; for example:
4 mA on the 4 mA to 20 mA range
0 mA on the 0 mA to 24 mA range
1
Midscale; for example:
12 mA on the 4 mA to 20 mA range
12 mA on the 0 mA to 24 mA range
EXTERNAL CURRENT SETTING RESISTOR
Referring to Figure 1, RSET is an internal sense resistor and is
part of the voltage-to-current conversion circuitry. The nominal
value of the internal current sense resistor is 15 k. To allow for
overrange capability in current mode, the user can also select
the internal current sense resistor to be 14.7 k, giving a nominal
2% overrange capability. This feature is available in the 0 mA to
24 mA, and 4 mA to 20 mA current ranges.
The stability of the output current value over temperature is
dependent on the stability of the value of RSET. As a method of
improving the stability of the output current over temperature,
an external low drift resistor can be connected to the REXT1
and REXT2 pins of the AD5749, which can be used instead of
the internal resistor. The external resistor is selected via the
input shift register. If the external resistor option is not used,
the REXT1 and REXT2 pins should be left floating.
PROGRAMMABLE OVERRANGE MODES
The AD5749 contains an overrange mode The overranges are
selected by configuring the R3, R2, R1, and R0 bits (or pins)
accordingly.
The overranges are typically 2%. For these ranges, the analog
input remains the same (0 V to 4.096 V).
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