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參數(shù)資料
型號： AD5735ACPZ
廠商： Analog Devices Inc
文件頁數(shù)： 6/48頁
文件大?。?/td> 0K
描述： IC DAC QUAD VOLT CUR 64-LFCSP
標準包裝： 1
設(shè)置時間： 18µs
位數(shù)： 12
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 托盤
輸出數(shù)目和類型： 4 電流，4 電壓
采樣率（每秒）： *
AD5735
Data Sheet
Rev. C | Page 14 of 48
Pin No.
Mnemonic
Description
43
GNDSWC
Ground Connection for DC-to-DC Switching Circuit. This pin should always be connected to ground.
44
SWC
Switching Output for Channel C DC-to-DC Circuitry. To use the dc-to-dc converter, connect this pin as
shown in Figure 77.
45
AVCC
Supply for DC-to-DC Circuitry. The voltage range is from 4.5 V to 5.5 V.
46
VBOOST_C
Supply for Channel C Current Output Stage (see Figure 71). This pin is also the supply for the VOUT_C stage,
which is regulated to 15 V by the dc-to-dc converter. To use the dc-to-dc converter, connect this pin as
47
IOUT_C
Current Output Pin for DAC Channel C.
48
COMPDCDC_C
DC-to-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of the Channel C dc-to-dc converter. Alternatively, if using an external compensation resistor,
place a resistor in series with a capacitor to ground from this pin. For more information, see the DC-to-DC
49
VOUT_C
Buffered Analog Output Voltage for DAC Channel C.
50
+VSENSE_C
Sense Connection for the Positive Voltage Output Load Connection for VOUT_C. The difference in voltage
between this pin and the VOUT_C pin is added directly to the headroom requirement.
51
VSENSE_C
Sense Connection for the Negative Voltage Output Load Connection for VOUT_C. This pin must stay within
±3.0 V of AGND for specified operation.
52
COMPLV_C
Optional Compensation Capacitor Connection for VOUT_C Output Buffer. Connecting a 220 pF capacitor
between this pin and the VOUT_C pin allows the voltage output to drive up to 2 μF. Note that the addition
of this capacitor reduces the bandwidth of the output amplifier, increasing the settling time.
53
AVSS
Negative Analog Supply Pin. The voltage range is from 10.8 V to 26.4 V.
54
IOUT_D
Current Output Pin for DAC Channel D.
55
VOUT_D
Buffered Analog Output Voltage for DAC Channel D.
56
VBOOST_D
Supply for Channel D Current Output Stage (see Figure 71). This pin is also the supply for the VOUT_D stage,
which is regulated to 15 V by the dc-to-dc converter. To use the dc-to-dc converter, connect this pin as
shown in Figure 77.
57
COMPDCDC_D
DC-to-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of the Channel D dc-to-dc converter. Alternatively, if using an external compensation resistor,
place a resistor in series with a capacitor to ground from this pin. For more information, see the DC-to-DC
58
+VSENSE_D
Sense Connection for the Positive Voltage Output Load Connection for VOUT_D. The difference in voltage
between this pin and the VOUT_D pin is added directly to the headroom requirement.
59
VSENSE_D
Sense Connection for the Negative Voltage Output Load Connection for VOUT_D. This pin must stay within
±3.0 V of AGND for specified operation.
60
COMPLV_D
Optional Compensation Capacitor Connection for VOUT_D Output Buffer. Connecting a 220 pF capacitor
between this pin and the VOUT_D pin allows the voltage output to drive up to 2 μF. Note that the addition
of this capacitor reduces the bandwidth of the output amplifier, increasing the settling time.
61
REFIN
External Reference Voltage Input.
62
REFOUT
Internal Reference Voltage Output. It is recommended that a 0.1 μF capacitor be placed between REFOUT
and REFGND.
63
RSET_D
An external, precision, low drift, 15 kΩ current setting resistor can be connected to this pin to improve the
IOUT_D temperature drift performance. For more information, see the External Current Setting Resistor section.
64
RSET_C
An external, precision, low drift, 15 kΩ current setting resistor can be connected to this pin to improve the
IOUT_C temperature drift performance. For more information, see the External Current Setting Resistor section.
EPAD
Exposed Pad. The exposed paddle should be connected to the potential of the AVSS pin, or, alternatively,
it can be left electrically unconnected. It is recommended that the paddle be thermally connected to a
copper plane for enhanced thermal performance.
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