參數(shù)資料
型號(hào)： AD5734RBREZ
廠商： Analog Devices Inc
文件頁數(shù)： 24/32頁
文件大?。?/td> 0K
描述： IC DAC 14BIT DSP/SRL 24TSSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源： Software Configurable 14-Bit Quad-Channel Unipolar/Bipolar Voltage Output Using AD5734R (CN0084)
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 10µs
位數(shù)： 14
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 雙 ±
功率耗散（最大）： 310mW
工作溫度： -40°C ~ 80°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm）裸露焊盤
供應(yīng)商設(shè)備封裝： 24-TSSOP 裸露焊盤
包裝： 管件
輸出數(shù)目和類型： 4 電壓，單極；4 電壓，雙極
采樣率（每秒）： 100k
產(chǎn)品目錄頁面： 784 (CN2011-ZH PDF)
AD5724R/AD5734R/AD5754R
Rev. E | Page 30 of 32
DESIGN FEATURES
ANALOG OUTPUT CONTROL
In many industrial process control applications, it is vital that
the output voltage be controlled during power-up. When the
supply voltages change during power-up, the VOUTx pins are
clamped to 0 V via a low impedance path (approximately 4 kΩ).
To prevent the output amplifiers from being shorted to 0 V
during this time, Transmission Gate G1 is also opened (see
Figure 48). These conditions are maintained until the power
supplies have stabilized and a valid word is written to a DAC
register. At this time, G2 opens and G1 closes.
VOUTA
G1
G2
VOLTAGE
MONITOR
AND
CONTROL
0
64
65
-0
10
Figure 48. Analog Output Control Circuitry
POWER-DOWN MODE
Each DAC channel of the AD5724R/AD5734R/AD5754R can
be individually powered down. By default, all channels are in
power-down mode. The power status is controlled by the power
control register (see Table 27 and Table 28 for details). When a
channel is in power-down mode its output pin is clamped to
ground through a resistance of approximately 4 kΩ and the
output of the amplifier is disconnected from the output pin.
OVERCURRENT PROTECTION
Each DAC channel of the AD5724R/AD5734R/AD5754R
incorporates individual overcurrent protection. The user has
two options for the configuration of the overcurrent protection:
constant current clamp or automatic channel power-down. The
configuration of the overcurrent protection is selected via the
clamp enable bit in the control register.
Constant Current Clamp (Clamp Enable = 1)
If a short circuit occurs in this configuration, the current is
clamped at 20 mA. This event is signaled to the user by the
setting of the appropriate overcurrent (OCX) bit in the power
control register. Upon removal of the short-circuit fault, the
OCX bit is cleared.
Automatic Channel Power-Down (Clamp Enable = 0)
If a short circuit occurs in this configuration, the shorted
channel powers down and its output is clamped to ground via
a resistance of approximately 4 kΩ. Also, at this time, the output
of the amplifier is disconnected from the output pin. The short-
circuit event is signaled to the user via the overcurrent bits (OCX),
while the power-up bits (PUX) indicate which channels have
powered down. After the fault is rectified, the channels can be
powered up again by setting the PUX bits.
THERMAL SHUTDOWN
The AD5724R/AD5734R/AD5754R incorporate a thermal
shutdown feature that automatically shuts down the device if
the core temperature exceeds approximately 150°C. The thermal
shutdown feature is disabled by default and can be enabled
via the TSD enable bit of the control register. In the event of a
thermal shutdown, the TSD bit of the power control register is set.
INTERNAL REFERENCE
The on-chip voltage reference is powered down by default. If
an external voltage reference source is to be used, the internal
reference must remain powered down at all times. If the internal
reference is to be used as the reference source, it must be powered
up via the PUREF bit of the power control register. The internal
reference voltage is accessible at the REFIN/REFOUT pin for use
as a reference source for other devices within the system. If the
internal reference is to be used external to the AD5724R/
AD5734R/AD5754R, it must first be buffered.
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