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參數(shù)資料
| 型號(hào)： | AD5643RBRMZ-3REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/32頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT DUAL 1.25V 10MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | nanoDAC™ |
| 設(shè)置時(shí)間： | 3.5µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 5mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | 250k |
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AD5623R/AD5643R/AD5663R
Data Sheet
Rev. E | Page 18 of 32
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy or integral nonlinearity is a
measurement of the maximum deviation, in LSBs, from a
straight line passing through the endpoints of the DAC transfer
function. A typical INL vs. code plot is shown in Figure 5.
Differential Nonlinearity (DNL)
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ±1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design. A typical DNL vs. code plot is shown in
Zero-Scale Error
Zero-scale error is the measurement of the output error when
zero code (0x0000) is loaded to the DAC register. Ideally, the
output should be 0 V. The zero-scale error is always positive in
the AD56x3R because the output of the DAC cannot go below
0 V. It is due to a combination of the offset errors in the DAC
and the output amplifier. Zero-scale error is expressed in mV.
A plot of zero-scale error vs. temperature is shown in Figure 26.
Full-Scale Error
Full-scale error is the measurement of the output error when
full-scale code (0xFFFF) is loaded into the DAC register. Ideally,
the output should be VDD 1 LSB. Full-scale error is expressed
in percent of full-scale range. A plot of full-scale error vs.
temperature is shown in Figure 25.
Gain Error
Gain error is a measure of the span error of the DAC. It is the
deviation in slope of the DAC transfer characteristic from ideal,
expressed as a percent of the full-scale range.
Zero-Scale Error Drift
Zero-scale error drift is the measurement of the change in zero-
scale error with a change in temperature. It is expressed in
microvolts/°C (V/°C).
Gain Temperature Coefficient
Gain temperature coefficient is a measurement of the change in
gain error with changes in temperature. It is expressed in (ppm
of full-scale range)/°C.
Offset Error
Offset error is a measure of the difference between VOUT (actual)
and VOUT(ideal) expressed in mV in the linear region of the
transfer function. Offset error is measured on the AD56x3R
with code 512 loaded in the DAC register. It can be negative or
positive.
DC Power Supply Rejection Ratio (PSRR)
PSRR indicates how the output of the DAC is affected by
changes in the supply voltage. PSRR is the ratio of the change in
VOUT to a change in VDD for full-scale output of the DAC. It
is measured in dB. VREF is held at 2 V, and VDD is varied by
±10%.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for
the output of a DAC to settle to a specified level for a 1/4 to 3/4
full-scale input change and is measured from the 24th falling
edge of SCLK.
Digital-to-Analog Glitch Impulse
The impulse injected into the analog output when the input
code in the DAC register changes state. It is normally specified
as the area of the glitch in nV-s and is measured when the
digital input code is changed by 1 LSB at the major carry
transition (0x7FFF to 0x8000). See Figure 38.
Digital Feedthrough
A measure of the impulse injected into the analog output of the
DAC from the digital inputs of the DAC, digital feedthrough is
measured when the DAC output is not updated. It is specified
in nV-s, and it is measured with a full-scale code change on the
data bus, that is, from all 0s to all 1s and vice versa.
Reference Feedthrough
Reference feedthrough is the ratio of the amplitude of the signal
at the DAC output to the reference input when the DAC output
is not being updated (that is, LDAC is high). It is expressed in
decibels (dB).
Noise Spectral Density
Noise spectral density is a measurement of the internally
generated random noise. Random noise is characterized as a
spectral density (nV/√Hz). It is measured by loading the DAC
to midscale and measuring noise at the output. A plot of noise
spectral density is shown in Figure 44.
DC Crosstalk
DC crosstalk is the dc change in the output level of one DAC in
response to a change in the output of another DAC. It is
measured with a full-scale output change on one DAC (or soft
power-down and power-up) while monitoring another DAC
kept at midscale. It is expressed in microvolts (μV).
DC crosstalk due to load current change is a measure of the
impact that a change in load current on one DAC has to
another DAC kept at midscale. It is expressed in microvolts/
milliamps (μV/mA).
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| AD5643RBRMZ-5 | 功能描述:IC DAC 14BIT DUAL 2.5V 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:nanoDAC™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD5643RBRMZ-5REEL7 | 功能描述:IC DAC 14BIT DUAL 2.5V 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:nanoDAC™ 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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