information for operation below V
參數(shù)資料
型號: AD5626BRMZ
廠商: Analog Devices Inc
文件頁數(shù): 3/20頁
文件大小: 0K
描述: IC DAC NANO 12BIT 8-MSOP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 50
系列: nanoDAC™
設置時間: 16µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 12.5mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-MSOP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
AD5626
Rev. A | Page 11 of 20
voltage vs. load current plot, shown in Figure 11, provides
information for operation below VDD = 4.75 V.
TIMING AND CONTROL
The AD5626 has a separate serial input register from the
12-bit DAC register that allows preloading of a new data value
into the serial register without disturbing the present DAC
output voltage. After the new value is fully loaded in the serial
input register, it can be asynchronously transferred to the DAC
register by strobing the LDAC pin. The DAC register uses a
level sensitive LDAC strobe that should be returned high before
any new data is loaded into the serial input register. At any time,
the contents of the DAC register can be reset to zero by strobing
the CLR pin that causes the DAC output voltage to go to zero
volts.
details all of the timing requirements together
with
, the control logic truth table.
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