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參數(shù)資料
| 型號： | AD557JPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT 5V OUT AMP 20-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | DACPORT® |
| 設(shè)置時(shí)間： | 800ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 125mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 1.25M |
AD557–SPECIFICATIONS
Model
Min
Typ
Max
Unit
RESOLUTION
8
Bits
RELATIVE ACCURACY
0
°C to 70°C
± 1/2
1
LSB
OUTPUT
Ranges
0 to 2.56
V
Current Source
5
mA
Sink
Internal Passive
Pull-Down to Ground
2
OUTPUT SETTLING TIME
3
0.8
1.5
s
FULL-SCALE ACCURACY
4
@ 25
°C
± 1.5
± 2.5
LSB
TMIN to TMAX
± 2.5
± 4.0
LSB
ZERO ERROR
@ 25
°C
± 1
LSB
TMIN to TMAX
± 3
LSB
MONOTONICITY
5
TMIN to TMAX
Guaranteed But Not Tested
DIGITAL INPUTS
TMIN to TMAX
Input Current
100
A
Data Inputs, Voltage
Bit On—Logic “1”
2.0
V
Bit On—Logic “0”
0
0.8
V
Control Inputs, Voltage
On—Logic “1”
2.0
V
On—Logic “0”
0
0.8
V
Input Capacitance
4
pF
TIMING
6
tW Strobe Pulsewidth
225
ns
TMIN to TMAX
300
ns
tDH Data Hold Time
10
ns
TMIN to TMAX
10
ns
tDS Data Setup Time
225
ns
TMIN to TMAX
300
ns
POWER SUPPLY
Operating Voltage Range (VCC)
2.56 Volt Range
4.5
5.5
V
Current (ICC)15
25
mA
Rejection Ratio
0.03
%/%
POWER DISSIPATION, VCC = 5 V
75
125
mW
OPERATING TEMPERATURE RANGE
0
70
°C
NOTES
1 Relative Accuracy is defined as the deviation of the code transition points from the
ideal transfer point on a straight line from the offset to the full scale of the device.
See “Measuring Offset Error” on the AD558 data sheet.
2Passive pull-down resistance is 2 k
.
3Settling time is specified for a positive-going full-scale step to
±1/2 LSB. Negative-
going steps to zero are slower, but can be improved with an external pull-down.
4The full-scale output voltage is 2.55 V and is guaranteed with a 5 V supply.
5A monotonic converter has a maximum differential linearity error of
±1 LSB.
6See Figure 7.
Specifications shown in boldface are tested on all production units at electrical test.
Specifications subject to change without notice.
(@ TA = 25 C, VCC = 5 V unless otherwise noted)
PIN CONFIGURATIONS
DIP
VOUT SENSE B
CS
CE
10
9
13
12
11
16
15
14
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
AD557
GND
VOUT SENSE A
VOUT
BIT 7
BIT 6
BIT 5
+VCC
GND
BIT 4
BIT 3
BIT 2
(MSB) BIT 1
(LSB) BIT 8
PLCC
20 19
1
2
3
4
5
6
7
8
9
10 11 12 13
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
18
14
15
16
17
BIT 6
BIT 5
NC
BIT 4
BIT 3
VOUT SENSE B
GND
NC
GND
+VCC
AD557
V
OUT
SENSE
A
BIT
7
V
OUT
NC
BIT
8
(LSB)
NC = NO CONNECT
BIT
2
(MSB)
BIT
1
NC
CE
CS
REV. B
–2–
ORDERING GUIDE
Temperature
Package
Model
Range
Description
Option
AD557JN
0
°C to 70°C
Plastic DIP
N-16
AD557JP
0
°C to 70°C
Plastic Leaded Chip Carrier P-20A
ABSOLUTE MAXIMUM RATINGS
*
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 18 V
Digital Inputs (Pins 1–10) . . . . . . . . . . . . . . . . . . . 0 V to 7.0 V
VOUT . . . . . . . . . . . . . . . . . . . . . . . Indefinite Short to Ground
Momentary Short to VCC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Storage Temperature Range
N/P (Plastic) Packages . . . . . . . . . . . . . . . . –25
°C to +100°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300
°C
Thermal Resistance
Junction to Ambient/Junction to Case
N/P (Plastic) Packages . . . . . . . . . . . . . . . . . . 140/55
°C/W
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
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