參數(shù)資料
型號(hào)： AD5557CRU
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： Dual Current Output, Parallel Input, 16-/14-Bit Multiplying DACs with 4-Quadrant Resistors
中文描述： PARALLEL, WORD INPUT LOADING, 0.5 us SETTLING TIME, 14-BIT DAC, PDSO38
封裝： MO-153BD-1, TSSOP-38
文件頁(yè)數(shù)： 4/20頁(yè)
文件大小： 481K
代理商： AD5557CRU
AD5547/AD5557
Parameter
AC CHARACTERISTICS
4
Output Voltage Settling Time
Rev. 0 | Page 4 of 20
Symbol
t
S
Conditions
To ±0.1% of full scale, data cycles from zero scale
to full scale to zero scale
V
REF
= 5 V p-p, data = full scale
V
REF
= 0 V, midscale to midscale – 1
V
REF
= 100 mV rms, f = 10 kHz
WR = 1, LDAC toggles at 1 MHz
V
REF
= 5 V p-p, data = full scale, f = 1 kHz
f = 1 kHz, BW = 1 Hz
Signal input at Channel A and measure the output
at Channel B, f = 1 kHz
Min
Typ
0.5
Max
Unit
μs
Reference Multiplying BW
DAC Glitch Impulse
Multiplying Feedthrough Error
Digital Feedthrough
Total Harmonic Distortion
Output Noise Density
Analog Crosstalk
BW
Q
V
OUT
/V
REF
Q
D
THD
e
N
C
AT
4
7
–65
7
–85
12
–95
MHz
nV-s
dB
nV-s
dB
nV/√Hz
dB
1
All static performance tests (except I
OUT
) are performed in a closed-loop system using an external precision OP97 I-V converter amplifier. The device R
FB
terminal is tied
to the amplifier output. The OP97’s +IN pin is grounded, and the DAC’s I
OUT
is tied to the OP97’s –IN pin. Typical values represent average readings measured at 25°C.
2
Guaranteed by design; not subject to production testing.
3
All input control signals are specified with t
R
= t
F
= 2.5 ns (10% to 90% of 3 V), and are timed from a voltage level of 1.5 V.
4
All ac characteristic tests are performed in a closed-loop system using an AD841 I-V converter amplifier.
0
t
WR
t
DS
t
DH
t
LWD
t
LDAC
t
RS
WR
DATA
LDAC
RS
Figure 3. AD5547/AD5557 Timing Diagram
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