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參數(shù)資料
| 型號(hào)： | AD5543SRMZ-EP |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT SRL 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 500ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 55µW |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電流，單極 |
Data Sheet
AD5543-EP
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VDD = 5 V ± 10%, VSS = 0 V, IOUT = virtual GND, GND = 0 V, VREF = 10 V, TA = full operating temperature range, unless otherwise noted.
Table 1.
Parameter
Symbol
Condition
5 V ± 10%
Unit
STATIC PERFORMANCE1
Resolution
N
1 LSB = VREF/216 = 153 μV when VREF = 10 V
16
Bits
Relative Accuracy
INL
±3
LSB max
Differential Nonlinearity
DNL
Monotonic
1/+2
LSB max
Output Leakage Current
IOUT
Data = 0x0000, TA = 25°C
10
nA max
Data = 0x0000, TA = TA maximum
20
nA max
Full-Scale Gain Error
GFSE
Data = 0xFFFF
±1/±4
mV typ/max
Full-Scale Temperature Coefficient2
TCVFS
1
ppm/°C typ
REFERENCE INPUT
VREF Range
VREF
15/+15
V min/max
Input Resistance
RREF
5
kΩ typ3
Input Capacitance2
CREF
5
pF typ
ANALOG OUTPUT
Output Current
IOUT
Data = 0xFFFF
2
mA typ
Output Capacitance2
COUT
Code dependent
200
pF typ
LOGIC INPUTS AND OUTPUT
Logic Input Low Voltage
VIL
0.8
V max
Logic Input High Voltage
VIH
2.4
V min
Input Leakage Current
IIL
10
μA max
Input Capacitance2
CIL
10
pF max
INTERFACE TIMING2, 4
Clock Input Frequency
fCLK
50
MHz
Clock Width High
tCH
10
ns min
Clock Width Low
tCL
10
ns min
CS to Clock Setup
tCSS
0
ns min
Clock to CS Hold
tCSH
10
ns min
Data Setup
tDS
5
ns min
Data Hold
tDH
10
ns min
SUPPLY CHARACTERISTICS
Power Supply Range
VDD RANGE
4.5/5.5
V min/max
Positive Supply Current
IDD
Logic inputs = 0 V
10
μA max
Power Dissipation
PDISS
Logic inputs = 0 V
0.055
mW max
Power Supply Sensitivity
PSS
ΔVDD = ±5%
0.006
%/% max
AC CHARACTERISTICS4
Output Voltage Settling Time
tS
To ±0.1% of full scale,
0.5
μs typ
Data = 0x0000 to 0xFFFF to 0x0000
Reference Multiplying Bandwidth
BW
VREF = 100 mV rms, data = 0xFFFF
6.6
MHz typ
DAC Glitch Impulse
Q
VREF = 0 V, data = 0x7FFF to 0x8000
7
nV-sec
Feedthrough Error
VOUT/VREF
Data = 0x0000, VREF = 100 mV rms, same channel
83
dB
Digital Feedthrough
Q
CS = 1 and fCLK = 1 MHz
7
nV-sec
Total Harmonic Distortion
THD
VREF = 5 V p-p, data = 0xFFFF, f = 1 kHz
103
dB typ
Output Spot Noise Voltage
eN
f = 1 kHz, BW = 1 Hz
12
nV/√Hz
1 All static performance tests (except IOUT) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The RFB terminal is tied to
the amplifier output. The +IN op amp is grounded, and the DAC IOUT is tied to the IN op amp. Typical values represent average readings measured at 25°C.
2 These parameters are guaranteed by design and are not subject to production testing.
3 All ac characteristic tests are performed in a closed-loop system using an AD8038 I-to-V converter amplifier except for THD where an AD8065 was used.
4 All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.
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