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參數(shù)資料
| 型號： | AD5541LRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SRL IN/VOUT 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 設(shè)計資源： | How to Achieve High Precision Voltage Level Setting Using AD5541A/42A (CN0169) |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時間： | 1µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 825µW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 1.5M |
Data Sheet
AD5541/AD5542
Rev. F | Page 13 of 20
POWER-ON RESET
The AD5541/AD5542 have a power-on reset function to ensure
that the output is at a known state on power-up. On power-up,
the DAC register contains all 0s until the data is loaded from
the serial register. However, the serial register is not cleared on
power-up, so its contents are undefined. When loading data
initially to the DAC, 16 bits or more should be loaded to prevent
erroneous data appearing on the output. If more than 16 bits are
loaded, the last 16 are kept, and if less than 16 bits are loaded,
bits remain from the previous word. If the AD5541/AD5542
need to be interfaced with data shorter than 16 bits, the data
should be padded with 0s at the LSBs.
POWER SUPPLY AND REFERENCE BYPASSING
For accurate high-resolution performance, it is recommended
that the reference and supply pins be bypassed with a 10 μF
tantalum capacitor in parallel with a 0.1 μF ceramic capacitor.
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