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參數(shù)資料
| 型號： | AD5530BRUZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT SERIAL IN 16TSSOP |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 2,500 |
| 設置時間： | 20µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 60mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，雙極 |
| 采樣率（每秒）： | 50k |
AD5530/AD5531
Rev. B | Page 17 of 20
APPLICATIONS INFORMATION
SERIAL INTERFACE TO MULTIPLE AD5530s OR
AD5531s
OPTOCOUPLER INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD5530/
AD5531 makes it ideal for opto-isolated interfaces because the
number of interface lines is kept to a minimum.
SYNC
shows a 4-channel isolated interface to the AD5530/AD5531.
To reduce the number of opto-isolators, if simultaneous
updating is not required, then the LDAC pin can be tied
permanently low.
00
93
8-
02
6
CONTROLLER
CONTROL OUT
TO LDAC
SYNC OUT
TO SYNC
SERIAL CLOCK OUT
TO SCLK
SERIAL DATA OUT
TO SDIN
OPTOCOUPLER
VCC
Figure 26. Opto-Isolated Interface
Figure 27 shows how the
pin is used to address multiple
AD5530/AD5531s. All devices receive the same serial clock and
serial data, but only one device receives the SYNC signal at any
one time. The DAC addressed is determined by the decoder.
There is some feedthrough from the digital input lines, the
effects of which can be minimized by using a burst clock.
00
93
8-
0
27
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
SDIN
VCC
DECODER1
ENABLE
EN
CODED
ADDRESS
DGND
1ADDITIONAL PINS
OMITTED FOR CLARITY.
Figure 27. Addressing Multiple AD5530/AD5531s
DAISY-CHAINING INTERFACE WITH MULTIPLE AD5530s OR AD5531s
A number of these DAC parts can be daisy-chained together using the SDO pin. Figure 28 illustrates such a configuration.
0
09
38
-02
8
AD5530/AD55311
SDO
SCLK
SDIN
SYNC
SCLK
SDIN
SYNC
AD5530/AD55311
SDO
SCLK
SDIN
SYNC
AD5530/AD55311
SDO
SCLK
SDIN
SYNC
TO OTHER
SERIAL DEVICES
VDD
R
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 28. Daisy-Chaining Multiple AD5530/AD5531s
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD5530BRUZ-REEL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit Digital-to-Analog Converters |
| AD5530BRUZ-REEL7 | 功能描述:IC DAC 12BIT SERIAL IN 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產品培訓模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標準包裝:91 系列:- 設置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應商設備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5530BRUZ-REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit Digital-to-Analog Converters |
| AD5531 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial Input, Voltage Output 12-/14-Bit DACs |
| AD5531BRU | 功能描述:IC DAC 14BIT SRL IN/VOUT 16TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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