參數(shù)資料
型號: AD5446YRMZ
廠商: Analog Devices Inc
文件頁數(shù): 17/29頁
文件大?。?/td> 0K
描述: IC DAC 14BIT MULTIPLYING 10-MSOP
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
設計資源: Versatile High Precision Programmable Current Sources Using DACs, Op Amps, and MOSFET Transistors (CN0151)
標準包裝: 50
位數(shù): 14
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 50.5µW
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-MSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 2.7M
產品目錄頁面: 782 (CN2011-ZH PDF)
配用: EVAL-AD5446EBZ-ND - BOARD EVALUATION FOR AD5446
Data Sheet
AD5444/AD5446
Rev. E | Page 23 of 28
PCB LAYOUT AND POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit boards on
which the AD5444/AD5446 are mounted should be designed
so the analog and digital sections are separated and confined to
certain areas of the board. If the DACs are in systems in which
multiple devices require a AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the devices.
The DAC should have ample supply bypassing of 10 F in
parallel with 0.1 F on the supply located as close to the pack-
age as possible, ideally right up against the device. The 0.1 F
capacitor should have low effective series resistance (ESR)
and effective series inductance (ESI), like the common ceramic
types that provide a low impedance path to ground at high
frequencies, to handle transient currents due to internal logic
switching. Low ESR, 1 F to 10 F tantalum or electrolytic
capacitors should also be applied at the supplies to minimize
transient disturbance and filter out low frequency ripple.
Fast switching signals such as clocks should be shielded with
digital ground to avoid radiating noise to other parts of the
board, and should never be run near the reference inputs.
Avoid crossover of digital and analog signals. Traces on oppo-
site sides of the board should run at right angles to each other.
This reduces the effects of feedthrough throughout the board.
A microstrip technique, by far the best, is not always possible
with a double-sided board. In this technique, the component
side of the board is dedicated to the ground plane, while signal
traces are placed on the solder side.
It is good practice to employ compact, minimum lead-length
PCB layout design. Leads to the input should be as short as
possible to minimize IR drops and stray inductance.
The PCB metal traces between VREF and RFB should also be
matched to minimize gain error. To maximize high frequency
performance, the I-to-V amplifier should be located as close
to the device as possible.
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