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參數(shù)資料
型號(hào): AD5426YRMZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 21/25頁(yè)
文件大?。?/td> 0K
描述: IC DAC 8BIT MULTIPLYING 10MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源: Unipolar, Precision DC Digital-to-Analog Conversion Using AD5426/32/43 8-Bit to12-Bit DACs (CN0034)
Precision, Bipolar Configuration for the AD5426/32/43 8-Bit to12-Bit DACs (CN0036)
AC Signal Processing Using AD5426/32/43 Current Output DACs (CN0037)
Programmable Gain Element Using AD5426/32/43 Current Output DACs (CN0038)
標(biāo)準(zhǔn)包裝: 50
位數(shù): 8
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 2.5M
AD5426/AD5432/AD5443
Data Sheet
Rev. G | Page 4 of 24
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
Output Capacitance
IOUT1
12
17
pF
All 0s loaded
10
12
pF
All 1s loaded
IOUT2
22
25
pF
All 0s loaded
10
12
pF
All 1s loaded
Digital Feedthrough
0.1
nV-s
Feedthrough to DAC output with SYNC high and
alternate loading of all 0s and all 1s
Analog THD
81
dB
VREF = 3.5 V p-p, all 1s loaded, f = 1 kHz
Digital THD
Clock = 1 MHz, VREF = 3.5 V, CCOMP = 1.8 pF
50 kHz fOUT
73
dB
20 kHz fOUT
74
dB
Output Noise Spectral Density
25
nV/√Hz
@ 1 kHz
SFDR Performance (Wide Band)
Clock = 1 MHz, VREF = 3.5 V
50 kHz fOUT
75
dB
20 kHz fOUT
76
dB
SFDR Performance (Narrow Band)
Clock = 1 MHz, VREF = 3.5 V
50 kHz fOUT
87
dB
20 kHz fOUT
87
dB
Intermodulation Distortion
78
dB
Clock = 1 MHz, f1 = 20 kHz, f2 = 25 kHz, VREF = 3.5 V
POWER REQUIREMENTS
Power Supply Range
2.5
5.5
V
IDD
0.6
A
TA = 25°C, logic inputs = 0 V or VDD
0.4
5
A
T = 40°C to +125°C , logic inputs = 0 V or VDD
Power Supply Sensitivity1
0.001
%/%
VDD = ±5%
1
Guaranteed by design and characterization, not subject to production testing.
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