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參數(shù)資料
| 型號： | AD5405YCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC DUAL 12BIT MULT 40-LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 80ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 50µW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 21.3M |
| 產(chǎn)品目錄頁面： | 782 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5405EB-ND - BOARD EVAL FOR AD5405 |
AD5405
Rev. B | Page 16 of 24
VOUT
VDD
GND
IOUT2A
IOUT1A
VREFA
RFBA
VDD
C1
12-BIT
DAC
R3
R2
R1
VIN
R1 = R2R3
R2 + R3
GAIN = R2 + R3
R2
04463-
011
NOTES
1. SIMILAR CONFIGURATION FOR DAC B.
Y BE REQUIRED
2. C1 PHASE COMPENSATION (1pF TO 2pF) MA
IF A1 IS A HIGH SPEED AMPLIFIER.
Figure 36. Increasing Gain of Current Output DAC
DIVIDER OR PROGRAMMABLE GAIN ELEMENT
Current-steering DACs are very flexible and lend themselves to
many applications. If this type of DAC is connected as the
feedback element of an op amp and RFBA is used as the input
resistor, as shown in Figure 37, the output voltage is inversely
proportional to the digital input fraction, D.
For D = 1 2n, the output voltage is
()n
IN
OUT
V
D
V
=
=
1
VOUT
VDD
GND
VIN
IOUT2A
REF
IOU
V
A
T1A
RFBA VDD
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
04463-012
Figure 37. Current-Steering DAC Used as a Divider or
Programmable Gain Element
As D is reduced, the output voltage increases. For small
values of the digital fraction D, it is important to ensure that
the amplifier does not saturate and that the required accuracy is
met. For example, an 8-bit DAC driven with the binary code 0x10
(0001 0000)—that is, 16 decimal—in the circuit of Figure 37
should cause the output voltage to be 16 times VIN. However, if
th
weight in the range of 15.5/256 to 16.5/256 so that the possible
n error
or source in divider
ust be counterbalanced by an
the op amp through the DAC.
l
mperature coefficient specification. This parameter not
only affects the full-scale error, but also can affect the linearity
-
stem required to hold its overall
The primary requirement for the current-steering mode is an
e
een
he
This
ge in
to
.
kly.
e DAC has a linearity specification of ±0.5 LSB, D can have a
output voltage is in the range of 15.5 VIN to 16.5 VIN—a
of 3%, even though the DAC itself has a maximum error of 0.2%.
DAC leakage current is also a potential err
circuits. The leakage current m
opposite current supplied from
Because only a fraction, D, of the current into the VREF termina
is routed to the IOUT1 terminal, the output voltage changes as
follows:
Output Error Voltage Due to DAC Leakage = (Leakage × R)/D
where R is the DAC resistance at the VREF terminal.
For a DAC leakage current of 10 nA, R = 10 kΩ, and a gain (that
is, 1/D) of 16, the error voltage is 1.6 mV.
REFERENCE SELECTION
When selecting a reference for use with the AD54xx series of
current output DACs, pay attention to the reference’s output
voltage te
(INL and DNL) performance. The reference temperature coef-
ficient should be consistent with the system accuracy specifica
tions. For example, an 8-bit sy
specification to within 1 LSB over the temperature range 0°C to
50°C dictates that the maximum system drift with temperature
should be less than 78 ppm/°C. A 12-bit system with the same
temperature range to overall specification within 2 LSBs requires
a maximum drift of 10 ppm/°C. Choosing a precision reference
with low output temperature coefficient minimizes this error
source.
Table 7 lists some references available from Analog Devices that
are suitable for use with this range of current output DACs.
AMPLIFIER SELECTION
amplifier with low input bias currents and low input offset
voltage. Because of the code-dependent output resistance of th
DAC, the input offset voltage of an op amp is multiplied by the
variable gain of the circuit. A change in this noise gain betw
two adjacent digital fractions produces a step change in t
output voltage due to the amplifier’s input offset voltage.
output voltage change is superimposed on the desired chan
output between the two codes and gives rise to a differential
linearity error, which, if large enough, could cause the DAC
be nonmonotonic
The input bias current of an op amp also generates an offset at
the voltage output as a result of the bias current flowing in the
feedback resistor, RFB. Most op amps have input bias currents low
enough to prevent significant errors in 12-bit applications.
Common-mode rejection of the op amp is important in
voltage-switching circuits, because it produces a code-
dependent error at the voltage output of the circuit. Most
op amps have adequate common-mode rejection for use at
12-bit resolution.
Provided that the DAC switches are driven from true wideband,
low impedance sources (VIN and AGND), they settle quic
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| AD5405YCPZ-REEL | 功能描述:IC DAC DUAL 12BIT MULT 40LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5405YCPZ-REEL7 | 功能描述:IC DAC DUAL 12BIT MULT 40LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD540J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| AD540JH | 制造商:AD84/07 功能描述:Operational Amplifier, Single AMP, Bipolar/JFET, 8 Pin, Metal Can |
| AD540K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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